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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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TDA7421 датащи(PDF) 17 Page - STMicroelectronics |
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TDA7421 датащи(HTML) 17 Page - STMicroelectronics |
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17 / 38 page  ttim = (IFRC + 1) / fosc tcnt = (CF + 1697) / fIF FM mode tcnt = (CF + 44) / fIF AM mode Counter result succeeded: ttim > tcnt - terr and ttim > tcnt + terr Counter result failed: ttim< tcnt + terr or ttim > tcnt - terr where: ttim = IF time cycle time tcnt = IF counter cycle time terr = discrimination window (controlled by the EW registers) The precision of the measurements is adjustable by controlling the discrimination window. This is adjustable by programming the control registers EW0...EW2. The measurement time per cycle is adjustable by setting the register IFS0 - IFS2. The center frequency of the discrimination win- dow is adjustable by the control register "CF0" to "CF4". The available values are reported in dat- abyte specification I 2C BUS INTERFACE General Description The TDA7421 supports the I 2C bus protocol. This protocol defines the devices sending data into the bus as transmitter and the receiving device as the receiver. The device that controls the transfer is a master and the device being controlled is the slave. The master will always initiates data transfer and pro- vide the clock to transmit or receive operations. Data Transition Data transition on the SDA line must only occur when the clock SCL is low. SDA transitions while SCL is high will be interpreted as START or STOP condition. Start Condition Phase Comparator ttim tcnt -tERR succeeded tcnt +tERR failed failed D96AU551 TDA7421 17/38 |
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