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Document Number: 91241

4

S-Pending-Rev. A, 26-Jun-08

IRFPC50A, SiHFPC50A

Vishay Siliconix

Fig. 5 - Typical Capacitance vs. Drain-to-Source Voltage

Fig. 6 - Typical Gate Charge vs. Gate-to-Source Voltage

Fig. 7 - Typical Source-Drain Diode Forward Voltage

Fig. 8 - Maximum Safe Operating Area

1

10

100

1000

10000

100000

1

10

100

1000

DS

V

, Drain-to-Source Voltage (V)

V

= 0V,

f = 1MHz

C

= C

+ C

, C

SHORTED

C

= C

C

= C

+ C

GS

iss

gs

gd

ds

rss

gd

oss

ds

gd

0

20

40

60

80

0

4

8

12

16

20

Q , Total Gate Charge (nC)

G

FOR TEST CIRCUIT

SEE FIGURE

I =

D

13

13A

V

= 120V

DS

V

= 300V

DS

V

= 480V

DS

0.1

1

10

100

0.2

0.4

0.6

0.8

1.0

1.2

1.4

1.6

V

,Source-to-Drain Voltage (V)

SD

V

= 0 V

GS

T = 25 C

J

°

T = 150 C

J

°

0.1

1

10

100

1000

10

100

1000

1000

OPERATION IN THIS AREA LIMITED

Single Pulse

T

T

= 150 C

= 25 C

°

°

J

C

V

, Drain-to-Source Voltage (V)

DS

10us

100us

1ms

10ms