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TDA7284D датащи(PDF) 8 Page - STMicroelectronics

номер детали TDA7284D
подробное описание детали  RECORD/PLAYBACK CIRCUIT WITH ALC
PDF  14 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
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CIRCUIT DESCRIPTION
OPERATIONAL AMPLIFIER
The operational amplifier consists essentially of a
very low noise input stage decoupled from the
single-ended output stage by means of an emitter
follower (fig. 15 ).
The compensations provided in order to have
high gain bandwith product allowing the use for
double speed recording application.
AUTOMATIC LEVEL CONTROL SYSTEM (ALC)
This system maintains the level of the signal to be
recorded at a value which prevents saturation of
the tape and which optimizes the signal to noise
ratio even there are notable variations in the input
signal.
Before presenting the ALC circuit of TDA7284 it is
worth describing the operation of the automatic
level control as a system.A diagram showing the
basis of operation is given in fig.16.
This consists of an amplifier (op-amp) having con-
stant gain (GV = 1+R4/R3),which in feedback
transforms output signal level information (usually
by means of a peak-to-peak detector) into a con-
tinuous voltage which drives the networks indi-
cated by T and Rd.
The element T transforms the continuous voltage
level into a signal capable of modifying the circuit
conditions symbolized by variable resistor Rd.
The value assumed by the resistor Rd is a func-
tion of the output signal level Vo and is such that
the voltage Vc at the input of the op-amp is con-
stant,even variations of Vi are present.Obviously
if Vo is less than a certain value the system is not
controlled.
In this case :
VI =VC=VO /GV
(GV is the gain of the op-amp)
For the TDA7284 the value of Vo below which the
system is not controlled is around 1 Vrms.
Let us now consider the speed of response of the
system (when controlled) to positive and negative
changes of the input signal i.e. the limiting
time,the time for return to nominal level (1 Vrms)
and the recovery time.
Limiting time, and time for return to nominal
level.
Let us suppose that at certain moment To, the in-
put signal increases by +
∆Vi as shown in fig. 17.
Figure 15
Figure 16: Basic Diagram of the ALC stage
TDA7284
8/14



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