M38044FFHKP datasheet(283/387 Pages) RENESAS

283 / 387 page

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APPLICATION

2.13 Flash memory mode

Rev.1.00 Jan 14, 2005

REJ09B0212-0100Z

3804 Group (Spec.H)

2.13.4 Parallel I/O mode

In the parallel I/O mode, program/erase to the built-in flash memory can be performed by a flash memory

programmer (EFP-I etc.).

The memory area of program/erase is from 0F00016 to 0FFFF16 (boot ROM area) or from 0100016 to

0FFFF16 (user ROM area). Be especially careful when erasing; if the memory area is not set correctly, the

products will be damaged eternally.

Table 2.13.1 shows the parallel unit when programming by EFP-I in the parallel I/O mode.

•EFP-I provided by Suisei Electronics System Co., Ltd. (http://www.suisei.co.jp/index_e.htm)

(product available in Asia and Oceania only)

Table 2.13.1 Parallel unit when parallel programming (when using EFP-I provided by Suisei Electronics

System Co., Ltd.)

Products

M38049FFHSP

M38049FFHFP

M38049FFHHP

M38049FFHKP

Parallel unit

EF3803F-64S

EF3803F-64F

EF3803F-64H

EF3803F-64U

Boot ROM area

0F00016 to 0FFFF16

User ROM area

0100016 to 0FFFF16

2.13.5 Standard serial I/O mode

Table 2.13.2 shows a pin connection example (4 wires) between the programmer (EFP-I; Serial unit

EF1SRP-01U is required additionally) and the microcomputer when programming in the standard serial

I/O mode 1.

•EFP-I provided by Suisei Electronics System Co., Ltd. (http://www.suisei.co.jp/index_e.htm)

(product available in Asia and Oceania only)

Table 2.13.2 Connection example to programmer when serial programming (4 wires)

Pin name

P46/SCLK1

P44/RxD1

P45/TxD1

P47/SRDY1/CNTR2

CNVSS

RESET (Note 1)

VCC (Note 2)

VSS, AVSS (Note 3)

M38049FFHSP

pin number

32, 3

Flash memory version

Notes 1: Since reset release after write verification is not performed, when operating MCU after writing,

separate a target connection cable.

2: Supply Vcc of EFP-I side from user side so that the power supply voltage of the output buffer used

by the EFP-I side becomes the same as user side power supply voltage (Vcc).

3: Four pins (No. 1, 2, 15, and 16) of the EF1SRP-01U side connector are prepared for GND signal.

When connecting with a target board, although connection of only one pin does not have a

problem, we recommend connecting with two or more pins.

Function

Transfer clock input

Serial data input

Serial data output

Transmit/Receive

enable output

“H” input

Reset input

Target board power

source monitor input

GND

EFP-I (EF1SRP-01U)

Signal name

T_SCLK

T_TXD

T_RXD

T_BUSY

T_VPP

T_RESET

T_VDD (Note 2)

GND (Note 3)

EF1RP-01U side

connector Line number

1, 2, 15, 16

M38049FFHSP

pin number

24, 59

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