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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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M38041FFHKP датащи(PDF) 334 Page - Renesas Technology Corp |
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M38041FFHKP датащи(HTML) 334 Page - Renesas Technology Corp |
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334 / 387 page  3-44 REJ09B0212-0100Z Rev.1.00 Jan 14, 2005 3804 Group (Spec.H) APPENDIX 3.4 Countermeasures against noise (2) Wiring for clock input/output pins • Make the length of wiring which is connected to clock I/O pins as short as possible. • Make the length of wiring (within 20 mm) across the grounding lead of a capacitor which is connected to an oscillator and the VSS pin of a microcomputer as short as possible. • Separate the VSS pattern only for oscillation from other VSS patterns. q Reason If noise enters clock I/O pins, clock waveforms may be deformed. This may cause a program failure or program runaway. Also, if a potential difference is caused by the noise between the VSS level of a microcomputer and the VSS level of an oscillator, the correct clock will not be input in the microcomputer. Noise XIN XOUT VSS XIN XOUT VSS N.G. O.K. Fig. 3.4.2 Wiring for clock I/O pins (3) Wiring to CNVss pin Connect the CNVss pin to the Vss pin with the shortest possible wiring. q Reason The processor mode of a microcomputer is influenced by a potential at the CNVss pin. If a potential difference is caused by the noise between pins CNVss and Vss, the processor mode may become unstable. This may cause a microcomputer malfunction or a program runaway. Fig. 3.4.3 Wiring for CNVss pin Noise CNVSS VSS CNVSS VSS N.G. O.K. |
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