4524 datasheet(91/310 Pages) RENESAS

91 / 310 page

4524 Group

HARDWARE

Rev.2.00

Aug, 06 2004

REJ09B0107-0200Z

1-78

Fig. 72 Analog input external circuit example-1

A/D converter-2

Each analog input pin is equipped with a capacitor which is used

to compare the analog voltage. Accordingly, when the analog volt-

age is input from the circuit with high-impedance and, charge/

discharge noise is generated and the sufficient A/D accuracy may

not be obtained. Therefore, reduce the impedance or, connect a

capacitor (0.01

µF to 1 µF) to analog input pins (Figure 72).

When the overvoltage applied to the A/D conversion circuit may

occur, connect an external circuit in order to keep the voltage

within the rated range as shown the Figure 73. In addition, test

the application products sufficiently.

Sensor

AIN

Apply the voltage withiin the specifications

to an analog input pin.

Sensor

AIN

About 1k

Ω

Fig. 73 Analog input external circuit example-2

Note on voltage drop detection circuit

The voltage drop detection circuit detection voltage of this

product is set up lower than the minimum value of the supply

voltage of the recommended operating conditions.

When the supply voltage of a microcomputer falls below to the

minimum value of recommended operating conditions and re-

goes up (ex. battery exchange of an application product),

depending on the capacity value of the bypass capacitor

added to the power supply pin, the following case may cause

program failure (Figure 74);

supply voltage does not fall below to VRST, and

its voltage re-goes up with no reset.

In such a case, please design a system which supply voltage

is once reduced below to VRST and re-goes up after that.

POF and POF2 instructions

When the POF or POF2 instruction is executed continuously af-

ter the EPOF instruction, system enters the power down state.

Note that system cannot enter the power down state when ex-

ecuting only the POF or POF2 instruction.

Be sure to disable interrupts by executing the DI instruction be-

fore executing the EPOF instruction and the POF or POF2

instruction continuously.

Power-on reset

When the built-in power-on reset circuit is used, the time for the

supply voltage to rise from 0 V to 2.0 V must be set to 100

µs or

less. If the rising time exceeds 100

µs, connect a capacitor be-

tween the RESET pin and VSS at the shortest distance, and input

“L” level to RESET pin until the value of supply voltage reaches

the minimum operating voltage.

Clock control

Execute the CMCK or the CRCK instruction in the initial setting routine

of program (executing it in address 0 in page 0 is recommended).

The oscillation circuit by the CMCK or CRCK instruction can be

selected only at once. The oscillation circuit corresponding to the

first executed one of these two instruction is valid. Other oscilla-

tion circuits and the on-chip oscillator stop.

On-chip oscillator

The clock frequency of the on-chip oscillator depends on the sup-

ply voltage and the operation temperature range.

Be careful that margin of frequencies when designing application

products.

Also, the oscillation stabilize wait time after system is released from re-

set is generated by the on-chip oscillator clock. When considering the

oscillation stabilize wait time after system is released from reset, be

careful that the margin of frequency of the on-chip oscillator clock.

External clock

When the external clock signal is used as the main clock (f(XIN)), note

that the power down mode (POF or POF2 instruction) cannot be used.

Difference between Mask ROM version and One Time PROM version

Mask ROM version and One Time PROM version have some dif-

ference of the following characteristics within the limits of an

electrical property by difference of a manufacture process, built-

in ROM, and a layout pattern.

• a characteristic value

• the amount of noise-proof

• a margin of operation

• noise radiation, etc.,

Accordingly, be careful of them when swithcing.

Note on Power Source Voltage

When the power source voltage value of a microcomputer is less

than the value which is indicated as the recommended operating

conditions, the microcomputer does not operate normally and

may perform unstable operation.

In a system where the power source voltage drops slowly when

the power source voltage drops or the power supply is turned off,

reset a microcomputer when the supply voltage is less than the

recommended operating conditions and design a system not to

cause errors to the system by this unstable operation.

Fig. 74 VDD and VRST

VDD

Recommended

operatng condition

min.value

No reset

Program failure may occur.

VRST

VDD

Recommended

operatng condition

min.value

VRST

→ Normal operation

Reset

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