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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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M38049FFHKP датащи(PDF) 346 Page - Renesas Technology Corp |
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M38049FFHKP датащи(HTML) 346 Page - Renesas Technology Corp |
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346 / 387 page  3-56 REJ09B0212-0100Z Rev.1.00 Jan 14, 2005 3804 Group (Spec.H) APPENDIX 3.5 Control registers Fig. 3.5.9 Structure of I2C control register I2C control register b7 b6 b5 b4 b3 b2 b1 b0 I2C control register (S1D: address 001416) b 0 Name 0 Functions At reset R W 0 0 1 2 0 3 I 2C-BUS interface enable bit (ES0) 4 0 Data format selection bit (ALS) 0: Addressing format 1: Free data format 0: 7-bit addressing format 1: 10-bit addressing format 5 0 Addressing format selection bit (10BIT SAD) 7 6 0 I2C-BUS interface pin input level selection bit (TISS) 0: Disabled 1: Enabled 0 0 0: 8 0 0 1: 7 0 1 0: 6 0 1 1: 5 1 0 0: 4 1 0 1: 3 1 1 0: 2 1 1 1: 1 0: SMBUS input 1: CMOS input b2b1b0 Bit counter (Number of transmit/receive bits) (BC0, BC1, BC2) 0 Nothing is arranged for this bit. This is a write disabled bit. When this bit is read out, the contents are “0”. Note: Do not use the read-modify-write instruction because some bits change by hardware when the start condition is detected and the byte-transfer is completed. ✕ |
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