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SH7065 датащи(PDF) 86 Page - Renesas Technology Corp |
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SH7065 датащи(HTML) 86 Page - Renesas Technology Corp |
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86 / 941 page ![]() Section 2 CPU Rev. 5.00 Sep 11, 2006 page 64 of 916 REJ09B0332-0500 Type Kinds of Instruction Op Code Function Number of Instructions EXTS Sign extension 33 EXTU Zero extension MAC Multiply and accumulate, double- precision multiply and accumulate MUL Double-precision multiplication MULS Signed multiplication MULU Unsigned multiplication NEG Sign inversion NEGC Sign inversion with borrow SUB Binary subtraction SUBC Binary subtraction with borrow Arithmetic operation instructions 21 SUBV Binary subtraction with underflow 6 AND Logical AND 14 NOT Bit inversion OR Logical OR TAS Memory test and bit set TST Logical AND T bit state Logic operation instructions XOR Exclusive logical OR 10 ROTCL 1-bit left shift with T bit 14 ROTCR 1-bit right shift with T bit ROTL 1-bit left shift ROTR 1-bit right shift SHAL Arithmetic 1-bit left shift SHAR Arithmetic 1-bit right shift SHLL Logical 1-bit left shift SHLLn Logical n-bit left shift SHLR Logical 1-bit right shift Shift instructions SHLRn Logical n-bit right shift |
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