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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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M32C/86T датащи(PDF) 100 Page - Renesas Technology Corp |
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M32C/86T датащи(HTML) 100 Page - Renesas Technology Corp |
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100 / 505 page  Page 77 9 7 4 f o 5 0 0 2 , 8 0 . p e S 0 0 . 1 . v e R 0 0 1 0 - 4 0 2 0 B 9 0 J E R 9. Clock Generation Circuit ) T 6 8 / C 2 3 M , 6 8 / C 2 3 M ( p u o r G 6 8 / C 2 3 M Figure 9.6 TCSPR and CPSRF Registers CNT0 CNT1 CNT2 CNT3 (b6 - b4) CST NOTES: 1. Rewrite the CNT3 to CNT0 bits after the CST bit is set to "0". 2. Value of the TCSPR register is not reset by software reset or watchdog timer reset. Count Source Prescaler Register Division Rate Select Bit(1) Operation Enable Bit Reserved Bit 0: Divider stops 1: Divider starts If setting value is n, f2n is the main clock, on-chip oscillator clock or PLL clock divided by 2n. When n is set to "0", no division is selected. Symbol Address After Reset(2) TCSPR 035F16 0XXX 00002 Function Bit Name Bit Symbol RW RW RW RW RW RO RW CPSR (b6 - b0) Clock Prescaler Reset Flag Clock Prescaler Reset Flag Nothing is assigned. When write, set to "0". When read, its content is indeterminate. Symbol Address After Reset CPSRF 034116 0XXX XXXX2 Function Bit Name Bit Symbol RW RW RW When the CPSR bit is set to "1", fC divided by 32 is reset. When read, its content is "0". When read, its content is indeterminate b7 b6 b5 b4 b3 b2 b1 b0 b7 b6 b5 b4 b3 b2 b1 b0 |
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