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M32C/86 датащи(PDF) 352 Page - Renesas Technology Corp

номер детали M32C/86
подробное описание детали  RENESAS 16/32-BIT SINGLE-CHIP MICROCOMPUTER M16C FAMILY / M32C/80 SERIES
PDF  505 Pages
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производитель  RENESAS [Renesas Technology Corp]
домашняя страница  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

M32C/86 датащи(HTML) 352 Page - Renesas Technology Corp

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Page 329
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23. CAN Module
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23.1.7 CANi Baud Rate Prescaler (CiBRP Register) (i=0, 1)
Figure 23.9 C0BRP and C1BRP Registers
The CiBRP register determines the Tq clock cycle of the CAN bit time. The baud rate is obtained from
Tq clock cycle x Tq per bit.
Tq clock cycle = (BRP+1) / CAN clock
Baud rate =
Tq per bit = SS + PTS + PBS1 + PBS2
Tq: Time quantum
BRP: Setting value of the CiBPR register; 1-255
SS: Synchronization Segment; 1 Tq
PTS: Propagation Time Segment; 1 to 8 Tq
PBS1: Phase Buffer Segment 1; 2 to 8 Tq
PBS2: Phase Buffer Segment 2; 2 to 8 Tq
CANi Baud Rate Prescaler (i=0, 1)
Symbol
Address
After Reset(1)
C0BRP
021716
0000 000116
C1BRP
029716
0000 000116
RW
Function
Setting Range
0116 to FF16(2)
If setting value is n, the CPU clock is divided
by (n+1).
RW
NOTES:
1. Value is obtained by setting the SLEEP bit in the CiSLPR register to "1" (sleep mode exited) after
reset and supplying the clock to the CAN module.
2. Do not set to "0016" (divide-by-1).
b7
b0
1
Tq clcok cycle x Tq per bit



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