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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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H8SX1663 датащи(PDF) 117 Page - Renesas Technology Corp |
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H8SX1663 датащи(HTML) 117 Page - Renesas Technology Corp |
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117 / 1158 page  Section 3 MCU Operating Modes Rev.1.00 Jun. 07, 2006 Page 65 of 1102 REJ09B0294-0100 Section 3 MCU Operating Modes 3.1 Operating Mode Selection This LSI has five operating modes (modes 2, 4, 5, 6, and 7). The operating mode is selected by the setting of mode pins MD2 to MD0. The setting of mode pin MD3 determines whether the various operating modes are with the SDRAM interface enabled or disabled. Table 3.1 lists MCU operating mode settings. Table 3.1 MCU Operating Mode Settings External Data Bus Width MCU Operating Mode MD2 MD1 MD0 CPU Operating Mode Address Space LSI Initiation Mode On-Chip ROM Default Max. 2 0 1 0 Advanced 16 Mbytes Boot mode Enabled 8 bits 16 bits 4 1 0 0 Disabled 16 bits 16 bits 5 1 0 1 On-chip ROM disabled extended mode Disabled 8 bits 16 bits 6 1 1 0 On-chip ROM enabled extended mode Enabled 8 bits 16 bits 7 1 1 1 Single-chip mode Enabled 8 bits 16 bits Table 3.2 SDRAM Interface Selection for MCU Operating Mode MD3 SDRAM Interface 0 Disabled 1 Enabled In this LSI, an advanced mode as the CPU operating mode and a 16-Mbyte address space are available. The initial external bus widths are eight or 16 bits. As the LSI initiation mode, the external extended mode, on-chip ROM initiation mode, or single-chip initiation mode can be selected. Mode 2 is the boot mode in which the flash memory can be programmed and erased. For details on the boot mode, see section 21, Flash Memory (0.18- µm F-ZTAT Version). |
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