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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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HD6417618A датащи(PDF) 437 Page - Renesas Technology Corp |
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HD6417618A датащи(HTML) 437 Page - Renesas Technology Corp |
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437 / 646 page  Section 15 Host Interface (HIF) Rev. 6.00 Jun. 12, 2007 Page 405 of 610 REJ09B0131-0600 15.4.8 HIF Data Register (HIFDATA) HIFDATA is a 32-bit register used to hold data to be written to HIFRAM and data read from HIFRAM for external device accesses. If HIFDATA is not used when accessing HIFRAM, it can be used for data transfer between an external device connected to the HIF and the on-chip CPU. HIFDATA can be read from and written to by the on-chip CPU. Access to HIFDATA by an external device should be performed with HIFDATA specified by bits REG5 to REG0 in HIFIDX and the HIFRS pin low. Bit Bit Name Initial Value R/W Description 31 to 0 D31 to D0 All 0 R/W 32-bit Data 15.4.9 HIF Boot Control Register (HIFBCR) HIFBCR is a 32-bit register for exclusive control of an external device and the on-chip CPU regarding access of HIFRAM. HIFBCR can be only read by the on-chip CPU. Access to HIFBCR by an external device should be performed with HIFBCR specified by bits REG5 to REG0 in HIFIDX and the HIFRS pin low. Bit Bit Name Initial Value R/W Description 31 to 8 — All 0 R Reserved These bits are always read as 0. The write value should always be 0. 7 to 1 — All 0 R/W AC-Bit Writing Assistance These bits should be used to write the bit pattern (H'A5) needed to set the AC bit to 1. These bits are always read as 0. |
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