SH7615 datasheet(39/925 Pages) RENESAS

39 / 925 page

Rev. 2.00, 03/05, page 1 of 884

Section 1 Overview

1.1

Features of SuperH Microcomputer with On-Chip Ethernet

Controller

The SH7615 is a CMOS single-chip microcomputer that integrates a high-speed CPU core using

an original Renesas Technology architecture with supporting functions required for an Ethernet

system.

The CPU has a RISC (Reduced Instruction Set Computer) type instruction set. The CPU basically

operates at a rate of one instruction per cycle, offering a great improvement in instruction

execution speed. In addition, the 32-bit internal architecture provides improved data processing

power, and DSP functions have also been enhanced with the implementation of extended Harvard

architecture DSP data bus functions. With this CPU, it has become possible to assemble low-cost,

high-performance/high-functionality systems even for applications such as realtime control, which

could not previously be handled by microcomputers because of their high-speed processing

requirements. The SH7615 also includes a maximum 4-kbyte cache, for greater CPU processing

power when accessing external memory.

The SH7615 is equipped with a media access controller (MAC) conforming to the IEEE802.3u

standard, and an Ethernet controller that includes a media independent interface (MII) standard

unit, enabling 10/100 Mbps LAN connection. Supporting functions necessary for system

configuration are also provided, including RAM, timers, a serial communication interface with

FIFO (SCIF), interrupt controller (INTC), and I/O ports.

SH7615 датащи(PDF) 39 Page - Renesas Technology Corp