R8C2K datasheet(271/471 Pages) RENESAS

271 / 471 page

R8C/2K Group, R8C/2L Group

16. Timers

Rev.1.10

Dec 21, 2007

Page 254 of 450

REJ09B0406-0110

Figure 16.96

Operating Example of Output Compare Function

Value in TRDi register

m+1

TSTARTi bit in

TRDSTR register

TRDIOAi output

IMFA bit in

TRDSRi register

n+1

TRDIOBi output

IMFB bit in

TRDSRi register

TRDIOCi output

IMFC bit in

TRDSRi register

Initial output “H”

“L” output by compare match

Set to 0 by a program

Count source

i = 0 or 1

M: Value set in TRDGRAi register

n: Value set in TRDGRBi register

p: Value set in TRDGRCi register

The above applies under the following conditions:

The CSELi bit in the TRDSTR register is set to 1 (the TRDi register is not stopped by compare match).

Bits BFCi and BFDi in the TRDMR register are set to 0 (registers TRDGRCi and TRDGRDi are not used as buffer registers).

Bits EAi, EBi, and ECi in the TRDOER1 register are set to 0 (enable the TRDIOAi, TRDIOBi and TRDIOCi pin outputs).

Bits CCLR2 to CCLR0 in the TRDCRi register are set to 001b (set the TRDi register to 000h by compare match in the TRDGRAi register).

The IOD3 bit in the TRDIORCi register is set to 1 (TRDGRDi register does not control TRDIOBi pin output).

m+1

n+1

P+1

Count

stops

Count

restarts

Output level

held

Output level

held

Output level

held

Set to 0 by a program

“H” output by compare match

Output inverted by compare match

Initial output “L”

Bits TOAi and TOBi in the TRDOCR register is set to 0 (initial output “L” to compare match), the TOCi bit is set to 1 (initial output “H” to compare match).

Bits IOA2 to IOA0 in the TRDIORAi register are set to 011b (TRDIOAi output inverted at TRDGRAi register compare match).

Bits IOB2 to IOB0 in the TRDIORAi register are set to 010b (TRDIOBi “H” output at TRDGRBi register compare match).

Bits IOC3 to IOC0 in the TRDIORCi register are set to 1001b (TRDIOCi “L” output at TRDGRCi register compare match).

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