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R8C2K датащи(PDF) 216 Page - Renesas Technology Corp

номер детали R8C2K
подробное описание детали  RENESAS MCU R8C FAMILY / R8C/2x SERIES
PDF  471 Pages
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производитель  RENESAS [Renesas Technology Corp]
домашняя страница  http://www.renesas.com
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R8C2K датащи(HTML) 216 Page - Renesas Technology Corp

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R8C/2K Group, R8C/2L Group
16. Timers
Rev.1.10
Dec 21, 2007
Page 199 of 450
REJ09B0406-0110
Figure 16.49
TRCIOR0 Register for Output Compare Function
Timer RC I/O Control Register 0
Symbol
Address
After Reset
TRCIOR0
0124h
10001000b
Bit Symbol
Bit Name
Function
RW
NOTES:
1.
2. When the BFD bit in the TRCMR register is set to 1 (buffer register of TRCGRB register), set the IOD2 bit in the
TRCIOR1 register to the same value as the IOB2 bit in the TRCIOR0 register.
—
IOB0
IOB1
RW
Nothing is assigned. If necessary, set to 0.
When read, the content is 1.
When the BFC bit in the TRCMR register is set to 1 (buffer register of TRCGRA register), set the IOC2 bit in the
TRCIOR1 register to the same value as the IOA2 bit in the TRCIOR0 register.
TRCGRB mode select bit(2)
Set to 0 (output compare) in the output compare
function.
RW
—
(b7)
IOB2
RW
TRCGRB control bits
b5 b4
0 0 : Disable pin output by compare
match (TRCIOB pin functions as the
programmable I/O port)
0 1 : “L” output by compare match in
the TRCGRB register
1 0 : “H” output by compare match in
the TRCGRB register
1 1 : Toggle output by compare match
in the TRCGRB register
b3 b2
IOA3
b1 b0
10
IOA2
0
b7 b6 b5 b4
RW
RW
IOA1
IOA0
TRCGRA control bits
b1 b0
0 0 : Disable pin output by compare
match (TRCIOA pin functions as the
programmable I/O port)
0 1 : “L” output by compare match in
the TRCGRA register
1 0 : “H” output by compare match in
the TRCGRA register
1 1 : Toggle output by compare match
in the TRCGRA register
TRCGRA mode select bit(1)
Set to 0 (output compare) in the output compare
function.
RW
TRCGRA input capture input
sw itch bit
Set to 1.
RW



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