STV0119A datasheet(24/42 Pages) STMICROELECTRONICS

24 / 42 page

IV - FUNCTIONAL DESCRIPTION (continued)

IV.18 - Line Skip / Line Insert Capability

This patented feature of the STV0119A offers the

possibility to cut the cost of the application by

suppressing the need for a VCXO.

Ideally, the master clock used on the application

board and fed to the MPEG decoding IC would

have exactly same frequency as the clock that was

used when the MPEG data was encoded. Obvi-

ously this is not realistic; up to now a solution

commonlychosen is to dynamicallyadjust the clock

on the board as closeto the ‘ideal’ clock as possible

with the help of time stamps embedded within the

MPEG stream. Such a kind of tracking often in-

volves the use of a VCXO : when the MPEG data

bufferfills up to more than some thresholdthe clock

frequency is increased, when it empties down to

some other threshold the clock frequency is low-

ered.

The STV0119A offers an alternative, cost-saving

solution: by programming the two bits jump and

dec_ninc in configuration Reg6, the STV0119A is

able to reduce or increase the length of some

frames in a way that will not introduce visible arte-

facts (even if comb-filtering is used). These bits

should be set according to the level of the MPEG

data buffer. Refer to Section VI.2 Register 6,

bit description.

Operation with the STV0119Aas sync master is as

follows :

- If the MPEG data buffers fills up too much: set bit

”jump” to ‘1’ and bit ”dec_ninc” to ‘1’.The

STV0119A will reduce the length of the current

frame (Bit ”jump” will then automatically be reset

to ‘0’).

- If the MPEG data buffers empties too much: set

bit ”jump” to ‘1’ and bit ”dec_ninc” to ‘0’.The

STV0119A will increase the length of the current

frame (Bit ”jump” will then automatically be reset

to ‘0’).

These operations can be repeated until the MPEG

data buffer is inside its fixed limits.

It is also possible to use the line skip/repeat capa-

bility in non-interlaced mode.

This functionalityof the STV0119Ais also available

in slave mode, in this case the sync signals sup-

plied to the STV0119Amust be in accordance with

the modified frame lengthes programmed.

IV.19 - Macrovision

™ Copy Protection

Process rev7.01/6.1

The chrominance, luminance and compositevideo

signals and R,G,B video signals can be altered

according to the MACROVISION

™ Copy Protec-

tion Process, Revision 7.01 and Revision 6.1.

This process is controlled via the I

2C bus.

A programming document is available to those cus-

tomers who have executed a license or a non-dis-

closure agreement with Macrovision Corporation.

For all relevant information or document, please

contact :

MACROVISION Corporation :

1341 ORLEANS DRIVE

SUNNIVALE, CALIFORNIA 94089

USA

Fax : 1.408.743.8610

IV.20 - CVBS, S-VHS and RGB Analog Outputs

Four out of six video signals (composite CVBS,

S-VHS (Y/C) and RGB) can be directed to 4 analog

output pins through 9-bit D/A converters operating

at the reference clock frequency.

The available combinations (see bit ‘rgb_nyc’ in

Reg5) are :

S-VHS (Y/C) + CVBS + CVBS1

or : R, G, B + CVBS1.

A single external analog power supply pair is used

for all DACs, but two independent pairs of current

and voltage references are needed. Each current

reference pin is normally connected externally to a

resistor tied to the analogue ground, whilst each

voltage reference pin is normally connected to a

capacitance tied to the analogue ground.

The internal current sources are independentfrom

the positive supply, thanks to a bangap, and the

consumption of the DACs is constant whatever the

codes converted.

Any unused DAC may be independentlydisabled

by software, in which case its output is at ‘neutral’

level (blanking for luma and composite outputs, no

color for chroma output, black for RGB outputs).

For applications where a single CVBS output is

required, the RGB/CVBS+S-VHS Triple DAC

should be disabled and Pins IREF(RGB), VR_RGB

tied to analog power supply.

STV0119A

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