R32C121 datasheet(17/113 Pages) RENESAS

17 / 113 page

REJ03B0237-0050 Rev.0.50 Jul 31, 2008

Page 17 of 111

Under development

Preliminary Specification

This is a preliminary specification and is subject to change.

R32C/121 Group

2. Central Processing Unit (CPU)

2.2

Fast Interrupt Registers

These registers are exclusively used to achieve high performance of interrupt sequence. Three types of

2.2.1

Save Flag Register (SVF)

This 32-bit register is used to save the flag register when a fast interrupt is generated.

2.2.2

Save PC Register (SVP)

This 32-bit register is used to save the program counter when a fast interrupt is generated.

2.2.3

Vector Register (VCT)

This 32-bit register is used to indicate a jump address when a fast interrupt is generated.

2.3

DMAC-associated Registers

Seven types of register are shown as below.

2.3.1

DMA Mode Registers (DMD0, DMD1, DMD2, and DMD3)

These 32-bit registers are used to set DMA transfer mode, bit rate etc.

2.3.2

DMA Terminal Count Registers (DCT0, DCT1, DCT2, and DCT3)

These 24-bit registers are used to set DMA transfer counting.

2.3.3

DMA Terminal Count Reload Registers (DCR0, DCR1, DCR2, and DCR3)

These 24-bit registers are used to set the reloaded value for DMA terminal count register.

2.3.4

DMA Source Address Registers (DSA0, DSA1, DSA2, and DSA3)

These 32-bit registers are used to set DMA source address.

2.3.5

DMA Source Address Reload Registers (DSR0, DSR1, DSR2, and DSR3)

These 32-bit registers are used to set the reloaded value for DMA source address register.

2.3.6

DMA Destination Address Registers (DDA0, DDA1, DDA2, and DDA3)

These 32-bit registers are used to set DMA destination address.

2.3.7

DMA Destination Address Reload Registers (DDR0, DDR1, DDR2, and

DDR3)

These 32-bit registers are used to set the reloaded value for DMA destination address register.

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