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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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M38044F2HKP датащи(PDF) 28 Page - Renesas Technology Corp |
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M38044F2HKP датащи(HTML) 28 Page - Renesas Technology Corp |
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28 / 116 page  Rev.1.01 Jan 25, 2005 page 28 of 114 REJ03B0131-0101Z 3804 Group (Spec. H) Fig. 21 Block diagram of timer X, timer Y, timer 1, and timer 2 Q Q “1” “0” P54/CNTR0 Q Q P55/CNTR1 “0” “1” R R T T f(XCIN) f(XCIN) XIN XCIN (1/2, 1/4, 1/8, 1/16, 1/32, 1/64, 1/128, 1/256, 1/512, 1/1024) Divider Count source selection bit CNTR0 active edge switch bit Port P54 direction register Pulse output mode Port P54 latch CNTR0 active edge switch bit Toggle flip-flop Pulse width measurement mode Timer mode Pulse output mode Timer X count stop bit Prescaler X (8) Prescaler X latch (8) Data bus Timer X latch (8) Timer X (8) To timer X interrupt request bit To CNTR0 interrupt request bit Timer X latch write pulse Pulse output mode Clock for timer Y Count source selection bit Event counter mode Pulse width measurement mode Timer mode Pulse output mode Timer Y count stop bit Event counter mode “0” “1” CNTR1 active edge switch bit Prescaler Y (8) Prescaler Y latch (8) Data bus Timer Y latch (8) Timer Y (8) To timer Y interrupt request bit To CNTR1 interrupt request bit Port P55 direction register Pulse output mode Port P55 latch “1” “0” CNTR1 active edge switch bit Toggle flip-flop Timer Y latch write pulse Pulse output mode Timer 2 latch (8) Timer 2 (8) To timer 2 interrupt request bit To timer 1 interrupt request bit Clock for timer 12 Prescaler 12 (8) Prescaler 12 latch (8) Data bus Timer 1 latch (8) Timer 1 (8) “00” “01” “10” Main clock division ratio selection bits |
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