PAM3130 datasheet(11/18 Pages) PAM

11 / 18 page

Application Information

08/2007

The PAM3130 family of low-dropout (LDO)

regulators have several features that allow them to

apply to a wide range of applications. The family

operates with very low input voltage (1.4V) and low

dropout voltage (typically 300mV at full load),

making it an efficient stand-alone power supply or

post regulator for battery or switch mode power

supplies. The 3A output current make the PAM3130

family suitable for powering many microprocessors

and FPGA supplies. The PAM3130 family also has

low output noise (typically 40μVRMS with 2.2μF

output capacitor), making it ideal for use in telecom

equipment.

A 2.2μF or larger ceramic input bypass capacitor,

connected between V and GND and located close

to the PAM3130, is required for stability. A 1.0uF

minimum value capacitor from V

to GND is also

required. To improve transient response, noise

rejection, and ripple rejection, an additional 10μF

or larger, low ESR capacitor is recommended at the

output. A higher value, low ESR output capacitor

may be necessary if large, fast-rise-time load

transients are anticipated and the device is located

several inches from the power source, especially if

the minimum input voltage of 1.4 V is used.

The PAM3130 features internal current limiting,

thermal protection and short circuit protection.

During normal operation, the PAM3130 limits

output current to about 4.5A. When current limiting

engages, the output voltage scales back linearly

until the over current condition ends. While current

limiting is designed to prevent gross device failure,

care should be taken not to exceed the power

dissipation r atings of the package. If the

temperature of the device exceeds 150°C, thermal-

protection circuitry will shut down. Once the device

has cooled down to approximately 50°C below the

high temp trip point, regulator operation resumes.

The short circuit current of the PAM3130 is about

1A when its output pin is shorted to ground.

The amount of heat that an LDO linear regulator

generates is:

P =(V -V )I .

All integrated circuits have a m aximum

allowable junction temperature (T max) above

which normal operation is not assured. A system

designer

must

design

the

operating

environment so that the operating junction

temperature (T ) does not exceed the maximum

junction temperature (T max). The two main

environmental variables that a designer can use

to improve thermal performance are air flow and

external heatsinks. The purpose o f t his

information is to aid the designer in determining

the proper operating environment for a linear

regulator that is operating at a specific power

level.

In general, the maximum expected power

(P (max)) consumed by a linear regulator is

computed as:

(1)

Where:

is the average input voltage.

is the average output voltage.

is the average output current.

is the quiescent current.

For most LDO regulators, the quiescent current

is insignificant compared to the average output

current; therefore, the term V

can be

neglected. The operating junction temperature

is computed by adding the ambient temperature

(T ) and the increase in temperature due to the

regulator' s power dissipation. The temperature

rise is computed by multiplying the maximum

expected power dissipation by the sum of the

thermal resistances between the junction and

the case R

), the case to heatsink (R

), and

the heatsink to ambient (R

). Thermal

resistances are measures of how effectively an

object dissipates heat. Typically, the larger the

device, the more surface area available for

power dissipation so that the object 's thermal

resistance will be lower.

External Capacitor Requirements

Regulator Protection

Thermal Information

DIN

I (avg)

O(avg)

(Q)

I(avg)

(Q)

(

θθ

()

() () () ( )

I avg

O avg

I avg

P max= V

-V

×I

PAM3130

3A Low Voltage-Low Dropout CMOS Regulator

Power Analog Microelectronics Inc

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