поискавой системы для электроныых деталей
  Russian  ▼
ALLDATASHEETRU.COM

X  

MSC7118 датащи(PDF) 43 Page - Freescale Semiconductor, Inc

номер детали MSC7118
подробное описание детали  Low-Cost 16-bit DSP with DDR Controller
PDF  60 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
производитель  FREESCALE [Freescale Semiconductor, Inc]
домашняя страница  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MSC7118 датащи(HTML) 43 Page - Freescale Semiconductor, Inc

Back Button MSC7118 Datasheet HTML 39Page - Freescale Semiconductor, Inc MSC7118 Datasheet HTML 40Page - Freescale Semiconductor, Inc MSC7118 Datasheet HTML 41Page - Freescale Semiconductor, Inc MSC7118 Datasheet HTML 42Page - Freescale Semiconductor, Inc MSC7118 Datasheet HTML 43Page - Freescale Semiconductor, Inc MSC7118 Datasheet HTML 44Page - Freescale Semiconductor, Inc MSC7118 Datasheet HTML 45Page - Freescale Semiconductor, Inc MSC7118 Datasheet HTML 46Page - Freescale Semiconductor, Inc MSC7118 Datasheet HTML 47Page - Freescale Semiconductor, Inc Next Button
Zoom Inzoom in Zoom Outzoom out
 43 / 60 page
background image
Hardware Design Considerations
MSC7118 Low-Cost 16-bit DSP with DDR Controller Data Sheet, Rev. 7
Freescale Semiconductor
43
3.2.2.3
Case 3
The power-up sequence is as follows:
1.
Turn on the VDDIO (3.3 V) supply first.
2.
Turn on the VDDC (1.2 V) supply second.
3.
Turn on the VDDM (2.5 V) and VREF (1.25 V) supplies simultaneously (third).
Note:
Make sure that the time interval between the ramp-up of VDDIO and VDDC is less than 10 ms.
The power-down sequence is as follows:
1.
Turn off the VDDM (2.5 V) and VREF (1.25 V) supplies simultaneously (first).
2.
Turn off the VDDC (1.2 V) supply second.
3.
Turn of the VDDIO (3.3 V) supply third (last).
Use the following guidelines:
•
Make sure that the time interval between the ramp-down for VDDIO and VDDC is less than 10 ms.
•
Make sure that the time interval between the ramp-up or ramp-down time for VDDC and VDDM is less than 10 ms for
power-up and power-down.
•
Refer to Figure 28 for relative timing for Case 3.
Figure 28. Voltage Sequencing Case 3
Time
Ramp-down
Ramp-up
VDDIO = 3.3 V
VDDM = 2.5 V
VDDC = 1.2 V
VREF = 1.25 V
<10 ms
<10 ms
<10 ms
<10 ms



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60


датащи скачать

Go To PDF Page


ссылки URL



Вашему бизинису помогли Аллдатащит?  [ DONATE ] 

Что такое Аллдатащит   |   реклама   |   контакт   |   Конфиденциальность   |   Ссылка на техническое описание    |   обмен ссыками   |   поиск по производителю
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com