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17511A датащи(PDF) 6 Page - Freescale Semiconductor, Inc |
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17511A датащи(HTML) 6 Page - Freescale Semiconductor, Inc |
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6 / 17 page ![]() Analog Integrated Circuit Device Data 6 Freescale Semiconductor 17511A ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS STATIC ELECTRICAL CHARACTERISTICS Table 4. Static Electrical Characteristics Characteristics noted under conditions TA = 25°C, VM = VDD = 5.0V, GND = 0V unless otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25°C under nominal conditions unless otherwise noted. Characteristic Symbol Min Typ Max Unit POWER Driver Circuit Power Supply Voltage VM 2.0 5.0 6.8 V Logic Supply Voltage VDD 2.7 5.0 5.7 V Capacitor for Charge Pump C1, C2, C3 0.01 0.1 1.0 μF Standby Power Supply Current Motor Supply Standby Current Logic Supply Standby Current (8) IV MSTBY IV DDSTBY – – – – 1.0 1.0 μA mA Operating Power Supply Current Logic Supply Current (9) Charge Pump Circuit Supply Current IV DD IC RES – – – – 3.0 0.7 mA mA Low VDD Detection Voltage (10) VDDDET 1.5 2.0 2.5 V Driver Output ON Resistance (11) RDS(ON) – 0.46 0.60 Ω GATE DRIVE Gate Drive Voltage (12) No Current Load VC RES 12 13 13.5 V Gate Drive Ability (Internally Supplied) IC RES = -1.0 mA VC RESLOAD 10 11.2 – V Gate Drive Output IOUT = -50 μA lIN = 50 μA VGOUTHIGH VGOUTLOW VC RES-0.5 LGND VC RES-0.1 LGND+0.1 VC RES LGND+0.5 V CONTROL LOGIC Logic Input Voltage VIN 0– VDD V Logic Input Function (2.7V < VDD < 5.7V) High-Level Input Voltage Low-Level Input Voltage High-Level Input Current Low-Level Input Current VIH VIL IIH IIL VDD x 0.7 – – -1.0 – – – – – VDD x 0.3 1.0 – V V μA μA Pull-Up Resistance (EN, GIN) RPU 50 100 200 k Ω Notes 8. IV DDSTBY includes current to the predriver circuit. 9. IV DD includes current to the predriver circuit. 10. Detection voltage is defined as when the output becomes high-impedance after VDD drops below the detection threshold. When the gate voltage VCRES is applied from an external source, VC RES = 7.5V. 11. IO = 1.0A source + sink. 12. Input logic signal not present. |
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