LNBH24 software description

LNBH24

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LNBH24 software description

sent before the DATA byte. The description below is valid for both sections.

7.1

Interface protocol

The interface protocol comprises:

●

A start condition (S)

●

A chip address byte (the LSB bit determines read (=1)/write (=0) transmission)

●

A sequence of data (1 byte + acknowledge)

●

A stop condition (P)

ACK = Acknowledge

S = Start

P = Stop

R/W = 1/0, Read/Write bit

X = 0/1, two addresses for each section selectable by ADDR-A/B pins (see Table 10)

7.2

System register (SR, 1 Byte for each section A and B)

Write = control bits functions in write mode

Read = diagnostic bits in read mode.

All bits reset to 0 at power on

7.3

Transmitted data (I²C bus write mode) for each section A/B

When the R/W bit in the section address is set to 0, the main MCU can write on the system

BUS. All and 8 bits are available and can be written by the MCU to control the device

functions as per the below Table 6.

Section address (A or B)

Data

MSB

LSB

MSB

LSB

S

0

0

0

1

0

X

X

R/W ACK

ACK

P

Mode

MSB

LSB

Write

PCL

TTX

TEN

LLC

VSEL

EN

ITEST

AUX

Read

IMON

VMON

TMON

LLC

VSEL

EN

OTF

OLF