Analog Integrated Circuit Device Data

Freescale Semiconductor

13

33811

FUNCTIONAL DEVICE OPERATION

OPERATIONAL MODES

FUNCTIONAL DEVICE OPERATION

OPERATIONAL MODES

POWER SUPPLY

The 33811 is designed to operate from 10.5V to 15.5V on

the VPWR pin. The VPWR pin supplies power to the internal

regulator which, in turn, supplies the analog circuit blocks.

The VDD Supply is used internally to supply the logic

communication threshold levels by supplying power to the

SO driver and the SI and CS input buffers. This IC

architecture provides flexible microprocessor interfacing.

NORMAL MODE

The Normal Mode of operation occurs when the following

conditions are met:

1) Device Junction Temperature is below 125°C.

4) A logic low (0) level is present on the RESET pin.

The major function of the 33811 integrated circuit is

provide the Engine or Transmission Control MCU with

information about the status of up to five solenoids. When a

solenoid is activated and operates properly, a unique current

profile is produced. This current profile can be observed as a

voltage waveform across the solenoid’s low side driver

MOSFET. The Solenoid Monitor inputs (SOLM1-5) on the

33811 are connected to voltage waveform monitoring circuits

that are capable of discerning a properly opening and closing

solenoid from one that is malfunctioning. When the 33811

determines that an solenoid is malfunctioning, a fault bit is set

in the corresponding Solenoid SPI register. When the MCU

interrogates the 33811 via the SPI, the solenoid fault will be

annunciated by setting the appropriate SPI fault bit to a logic

one (1).

SERIAL OUTPUT (SO) RESPONSE

All fault reporting is accomplished through the SPI

interface. All logic [1]s received by the MCU from the SO pin

indicate individual solenoid faults or the IC being held in the

RESET mode. All logic [0]s received by the MCU from the SO

pin indicate no fault, or normal operating solenoids. All fault

bits are cleared on the positive edge of CS. SO bits 15, 14,

13, 12, and 11 represent the fault status of

solenoids 4,3,2,1,and 5 respectively.

RESET MODE

The RESET pin is used to place the 33811 into the Reset

Mode. Normally the RESET pin is held at logic 0 by the MCU.

When the MCU raises the RESET pin to a logic 1, the 33811

enters the Reset Mode causing two events to occur:

1) The internal Solenoid SPI register bits are cleared to 0.

2) The SO output pin is tri-stated, and pulled high by a pull-

up resistor, causing all subsequent SPI Responses to contain

all bits set to logic (1).

When the RESET pin is brought low again, the SO pin will

be un-tri-stated and the SPI data will again reflect the data

contained in the SPI register and the Solenoid fault register.

SPI COMMUNICATION

The 33811 integrated circuit communicates to the MCU via

the SPI (Serial Peripheral Interface).

The SPI communication can be between one MCU and

one 33811, or it can be between one MCU and several 33811

ICs.

The MCU can send two different SPI messages to the

33811, one 8 bits in length and one 16 bits in length. The

33811 responds by sending back 8 bit or 16 bit messages.

When the MCU sends an 8 bit message to the 33811, the

33811 responds by sending only the 8 bit fault status. The

fault status contains 5 bits of solenoid status and 3 bits of

logic zeros. When the MCU sends a 16 bit interrogate

message, the 33811 responds by sending the 8 bit fault

status message followed by the last 8 previously sent bits.

The 33811 IC does not decode the SPI messages from the

MCU. It will always respond in the same way, regardless of

the contents of the 8 or 16 bits sent. Hence, no specific SPI

commands are defined, and response is limited to either

solenoid fault status alone, when an 8 bit message is sent, or

the solenoid fault status along with the last 8 bits received

when a 16 bit message is sent. The two SPI scenarios are

outlined in the following diagrams.

SPI COMMUNICATION SUMMARY

1) The SPI communications sequence starts out in step 1

above with the contents of the MCU SPI shift register

containing 8 bits of x x x x x x x x and 8 bits of y y y y y y y

y. The 33811 SPI register contains a previous 8 bit byte of p

p p p p p p p and the contents of the solenoid status register

of 0 0 0 S5 S1 S2 S3 S4 is transferred into the SPI register.

The condition shown is prior to the SPI transfer.

2) The MCU starts the transfer of data from it’s 16 bit SPI

register to the 33811’s SPI register by setting CS to a logic 0

and by issuing 16 SCLK pulses. At the end of the 16 SCLK

pulses, the MCU brings CS back high to a logic 1. When the

transfer is complete the MCU now contains the contents of

the 33811’s SPI register and the 33811 contains the contents

of the MCU’s SPI register.