Overview

STn8810

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Overview

The STn8810 platform comprises an industry-standard ARM CPU supported by smart

audio and video accelerators, on-chip memory and controllers, a rich set of peripheral

interfaces, and a power management system. The processors, controllers, memory and

peripheral interfaces are connected by a multi-layer advanced microcontroller bus

architecture (AMBA) for efficient data transport between the components. The overall

STn8810 architecture is illustrated in

Figure 2.

Figure 2.

STn8810 block diagram

DDR-

control

NOR

control

Watchdog

ARM926EJ

Timers (x8)

Vector

interrupt

LCD

controller

32 kHz

40 Kbytes

System

13/19.2 MHz

RTC

PWL

SD/MMC

FIrDA

UART (x3)

SSP

I²C interface

96 GPIOs

Flash

memory

I/D cache

ETM/JTAG

eSRAM

interface

Trace JTAG

LCD panel

(STN/TFT/module)

SDRAM

NAND

MSP (x3)

Boot ROM

32 Kbytes

MDIF

controller

eROM

64 Kbytes

eRAM

16 Kbytes

secured

secured

USB-OTG

Security

toolbox

Power

Secure

Camera

(parallel or

Backup

RAM 1 KB

controller

control

watchdog

PLL

CPU/buses/peripherals

manager

(x2)

interface

RTT

Interconnect (data/instruction, memory/peripherals)

Clocks

Smart audio

accelerator

serial)

TV

output

32/16 Kbytes

HPI

HSI

Smart

video

accelerator