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BUF16821 датащи(PDF) 9 Page - EPCOS |
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BUF16821 датащи(HTML) 9 Page - EPCOS |
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9 / 29 page ![]() V 2 COM OUT1 OUT2 OUT3 OUT4 OUT5 OUT6 GND A (2) V S OUT7 OUT8 OUT9 V SD SCL V COM1 OUT16 OUT15 OUT14 GND A (2) V S OUT13 OUT12 OUT11 OUT10 GND D (2) BKSEL A0 SDA BUF16821 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 27 26 25 24 23 22 21 20 19 18 17 16 15 V 2 COM V 1 COM V S (1) (1) (1) Timing Controller 3.3V 100nF 1 F m (1) (1) (1) (1) 100nF 10 F m Source Driver Source Driver (1) (1) (1) (1) (1) (1) (1) (1) (1) (1) V S 100nF 10 F m Source Driver (1) Source Driver SCL BUF16821 www.ti.com ...................................................................................................................................................................................................... SBOS428 – JULY 2008 (1) RC combination optional; see the Output Protection section. (2) GNDA and GNDD must be connected together. Figure 10. Typical Application Configuration Copyright © 2008, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Link(s): BUF16821 |
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