PM8800ATR datasheet(18/35 Pages) STMICROELECTRONICS

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PD interface

PM8800A

18/35

5.3

Under voltage lock-out

After the classification is completed, the PSE raises the voltage to provide the Power

Devices with the negotiated power. During the transition from low to operating voltage, the

internal UVLO is released and the hot-swap MOSFET is activated initiating the in-rush

sequence.

The IEEE 802.3af standard sets a maximum turn-on voltage (42 V) and the minimum turn-

off voltage (30 V) for the PDs and indicates normal voltage drops across the Ethernet cable.

The PM8800A implements the UVLO mechanism by setting 2 internal thresholds on the

voltage across the VIN-VSS pins; one is to activate the hot-swap (VUVLO_R), while the other

is to switch off the hot-swap MOSFET upon detection of a supply voltage drop (VUVLO_F)

from normal operating conditions.

No additional external components are required to comply with the IEEE 802.3af

requirements. Thermal protection alarm overrides the gate driving of the MOSFET

immediately switching off the MOSFET itself in case of device overheating. The hot-swap is

bypassed also in auxiliary source topology supplying directly the PWM and not requiring the

hot-swap to be active.

5.4

In rush current limit

Once the detection and classification phases have been successfully completed, the PSE

raises the voltage across the Ethernet cable. When the voltage difference between the VIN

and VSS is greater than the VUVLO_R threshold, the internal hot-swap MOSFET is switched

on and the DC-DC input capacitance is charged in a controlled way.

As depicted in the following figure, the current delivered by the hot-swap MOSFET during

inrush period is a function of the voltage drop between GND and VSS (hot-swap drain

source terminals). In more detail, the higher the voltage across the internal hot-swap, the

lower the current flowing trough it, so that the total dissipated power is almost constant

throughout the inrush phase, preventing the IC to reach the thermal protection limit.

The lower current limitation is internally set at 140 mA and takes action when the voltage

GND-VSS is above 30 V. The second limit is set at 250 mA when GND-VSS voltage is

between 30 V and 15 V. When the voltage falls below 15 V, the limit switches to the higher

Table 7.

value of the external classification resistor for the different PD class of

power

CLASS

PD power (W)

RCLASS (Ω)

IEEE 802.3af

Classification current (mA)

min

max

0.44 - 12.95

Open

0.44 - 3.84

158

3.84 - 6.49

82.5

6.49 - 12.95

52.3

Reserved

36.5

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