M48T02, M48T12

Clock operations

15/24

Figure 8.

Crystal accuracy across temperature

Figure 9.

Clock calibration

3.5

bypass capacitors will be released as low going spikes are generated or energy will be

absorbed when overshoots occur. A ceramic bypass capacitor value of 0.1µF (as shown in

Figure 10 on page 16) is recommended in order to provide the needed filtering.

In addition to transients that are caused by normal SRAM operation, power cycling can

one volt. These negative spikes can cause data corruption in the SRAM while in battery

backup mode. To protect from these voltage spikes, it is recommended to connect a

AI02124

-80

-60

-100

-40

-20

0

20

0

5

10

15

20

25

30

35

40

45

50

55

60

65

70

ΔF

= -0.038

(T - T

F

ppm

C

2

T

ppm

°C

AI00594B

NORMAL

POSITIVE

CALIBRATION

NEGATIVE

CALIBRATION