L6725ATR datasheet(11/32 Pages) STMICROELECTRONICS

номер детали	L6725ATR

подробное описание детали	Voltage mode PWM controller with bootstrap anti-discharging system

PDF	32 Pages

Scroll/Zoom	100%

производитель	STMICROELECTRONICS [STMicroelectronics]

домашняя страница	http://www.st.com

Logo

11 / 32 page

L6725 - L6725A

Device description

11/32

5.3

Bypassing the LDO to avoid the voltage drop with low Vcc

If VCC≈5V the internal LDO works in dropout with an output resistance of about 1Ω. The

maximum LDO output current is about 100mA and so the output voltage drop is 100mV, to

avoid this the LDO can be bypassed.

5.4

Internal and external references

It is possible to set the internal/external reference and the switching frequency by setting the

proper voltage at the EAREF pin. The maximum value of the external reference depends on the

VCC: with VCC = 4V the clamp operates at about 2V (typ.), while with VCC greater than 5V the

maximum external reference is 2.5V (typ.).

●

VEAREF from 0% to 80% of VCCDR -> External reference/Fsw = 250KHz

●

VEAREF from 80% to 95% of VCCDR -> VREF = 0.6V/Fsw = 500KHz

●

VEAREF from 95% to 100% of VCCDR -> VREF = 0.6V/Fsw = 250KHz

Providing an external reference from 0V to 450mV the output voltage will be regulated but

some restrictions must be considered:

●

The minimum OVP threshold is set at 300mV;

●

The under-voltage-protection doesn't work;

To set the resistor divider it must be considered that a 100K pull-down resistor is integrated into

the device (see Figure 4.). Finally it must be taken into account that the voltage at the EAREF

pin is captured by the device at the start-up when VCC is about 4V.

Figure 3.

Bypassing the LDO

L6725ATR датащи(PDF) 11 Page - STMicroelectronics