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November 2004

s

s

LOW POWER DISSIPATION:

s

HIGH NOISE IMMUNITY:

s

POWER DOWN PROTECTION ON

CONTROL INPUTS

s

SYMMETRICAL OUTPUT IMPEDANCE:

s

BALANCED PROPAGATION DELAYS:

s

OPERATING VOLTAGE RANGE:

s

PIN AND FUNCTION COMPATIBLE WITH

74 SERIES 245

s

IMPROVED LATCH-UP IMMUNITY

s

DESCRIPTION

The 74VHC245 is an advanced high-speed

CMOS OCTAL BUS TRANSCEIVER (3-STATE)

fabricated

with

sub-micron silicon gate and

This IC is intended for two-way asynchronous

communication

between

data

busses;

the

direction of data transmission is determined by

DIR input. The enable input G can be used to

disable the device so that the busses are

effectively isolated.

All

inputs

and

outputs

are

equipped

with

protection circuits against static discharge, giving

them 2KV ESD immunity and transient excess

voltage.

All floating bus terminals during High Z State must

be held HIGH or LOW.

74VHC245

OCTAL BUS

TRANSCEIVER (3-STATE)

Figure 1: Pin Connection And IEC Logic Symbols

Table 1: Order Codes

PACKAGE

T & R

SOP

74VHC245MTR

TSSOP

74VHC245TTR

TSSOP

SOP

Rev. 6