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STDVE001A датащи(PDF) 17 Page - STMicroelectronics |
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STDVE001A датащи(HTML) 17 Page - STMicroelectronics |
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17 / 49 page ![]() STDVE001A Functional description 17/49 3.5 I2C DDC line repeater The device contains two identical bi-directional open-drain, non-inverting buffer circuits that enable I2C DDC bus lines to be extended without degradation in system performance. The STDVE001A buffers both the serial data (DDC SDA) and serial clock (DDC SCL) on the I2C bus, while retaining all the operating modes and features of the I2C system. This enables two buses of 400 pF bus capacitance to be connected in an I2C application. These buffers are operational from a supply V of 3.0 V to 3.6 V. The I2C bus capacitance limit of 400 pF restricts the number of devices and bus length. The STDVE001A enables the system designer to isolate the two halves of a bus, accommodating more I2C devices or longer trace lengths. It can also be used to run two buses, one at 5 V and the other at 3.3 V or a 400 kHz and 100 kHz bus, where the 100 kHz bus is isolated when 400 kHz operation of the other bus is required. The STDVE001A can be used to run the I2C bus at both 5 V and 3.3 V interface levels. The DDC_EN acts as the enable for the DDC buffer. The DDC_EN line should not change state during an I2C operation, because disabling during bus operation hangs the bus and enabling port may through a bus cycle could confuse the I2C ports being enabled. The DDC_EN input should change state only when the global bus and repeater port are in idle state, to prevent system failures. The output low levels for each internal buffer are approximately 0.5 V, but the input voltage of each internal buffer must be 70 mV or more below the output low level, when the output internally is driven low. This prevents a lock-up condition from occurring when the input low condition is released. As with the standard I2C system, pull up resistors are required to provide the logic high levels on the buffered bus. The STDVE001A has standard open collector configuration of the I2C bus. The size of the pull up resistors depends on the system, but each side of the repeater must have a pull up resistor. This part is designed to work with standard mode and fast mode I2C devices. Standard mode I2C devices only specify 3 mA output drive, this limits the termination current to 3 mA in a generic I2C system where standard mode devices and multiple masters are possible. Under certain conditions, higher termination currents can be used. 3.6 Power-down condition The OE_N pin can be used to disable the device. Also there is no ESD protection dode to supply on any of the IOs. This prevents a reverse current flow condition when the main box is switched off while the TV is switched on. The OE_N is used to disable most of the internal circuitry of STDVE001A that puts the device in a low power mode of operation. |
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