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May 2003

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RECEIVER AND DRIVERS MEET OR

EXCEED THE REQUIREMENTS OF ANSI

EIA/TIA-644 STANDARD: RECEIVERS

LOW-VOLTAGE TTL (LVTTL) LEVELS

DESIGNED FOR SIGNALING RATES UP TO

630Mbps

s

OPERATES FROM A SINGLE 3.3V SUPPLY

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LOW VOLTAGE DIFFERENTIAL SIGNALING

WITH TYPICAL OUTPUT VOLTAGE OF

350mV AND A 100

Ω LOAD

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PROPAGATION DELAY TIME: 2.2ns (TYP)

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ELECTRICALLY COMPATIBLE WITH LVDS,

PECL, LVPECL, LVTTL, LVCOMOS, GTL,

BTL, CTT, SSTL, OR HSTL OUTPUTS WITH

EXTERNAL NETWORK

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BUS TERMINAL ESD (HBM) EXCEEDS 7KV

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SO AND TSSOP PACKAGING

DESCRIPTION

The STLVDS105 is a differential line receiver and

a LVTTL input connected to four differential line

drivers

that

implement

the

electrical

characteristics of low voltage differential signaling,

for point to point baseband data transmission over

controlled impedance media of approximately

100

Ω.

The

transmission

media

can

be

printed-circuit board traces, backplanes, or cable.

LVDS, as specified in EIA/TIA-644 is a data

signaling technique that offers low-power, low

noise coupling, and switching speed to transmit

data at a speed up to 630Mbps at relatively long

distances.

The drivers integrated into the same substrate,

along with the low pulse skew of balanced

signaling,

allow

extremely

precise

timing

alignment of the signals repeated from the input.

The device allows extremely precise timing

alignment of the signal repeated from the input.

This is particularly advantageous in distribution or

expansion of signals such as clock or serial data

stream.

ORDERING CODES

Type

Temperature

Range

Package

Comments

STLVDS105BD

-40 to 85 °C

SO-16 (Tube)

50parts per tube / 20tube per box

STLVDS105BDR

-40 to 85 °C

SO-16 (Tape & Reel)

2500 parts per reel

STLVDS105BTR

-40 to 85 °C

TSSOP16 (Tape & Reel)

2500 parts per reel

STLVDS105

4-PORT LVDS AND 4-PORT TTL-TO LVDS

REPEATERS

SOP

TSSOP