STULPI01A_08 datasheet(35/44 Pages) STMICROELECTRONICS

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STULPI01A - STULPI01B

ULPI registers

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Table 20.

USB interrupt enable rising register

0Dh-0Fh(Read), 0Dh(Write), 0Eh(Set), 0Fh(Clear)

(If set, the bits in this register cause an interrupt event notification to be generated when the

corresponding PHY signal changes from low to high. By default, all transitions are enabled. RxActive and

RxError must always be communicated immediately and so are not included in this register. Interrupt

circuitry can be powered down in any mode when both rising and falling edge enables are disabled. To

ensure interrupts are detectable when clock is powered down, the link should enable both rising and

falling edges.)

Field name

Bits

Access

Reset

Description

Host disconnect rise

rd/wr/s/c

Generates an interrupt event notification when host

disconnect changes from low to high. Applicable only in

host mode (DpPulldown and DmPulldown both set to

1b).

VbusValid rise

rd/wr/s/c

Generates an interrupt event notification when

VbusValid changes from low to high.

SessValid rise

rd/wr/s/c

Generate an interrupt event notification when SessValid

changes from low to high. SessValid is the same as

UTMI+ Avalid.

SessEnd rise

rd/wr/s/c

Generates an interrupt event notification when SessEnd

changes from low to high.

ID rise

rd/wr/s/c

Generates an interrupt event notification when ID

changes from low to high. ID is valid 50ms after IdPullup

is set to 1b, otherwise ID is undefined and should be

ignored.

Reserved

7:5

rd/wr/s/c

Reserved.

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