Clock operation

M41ST84W

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3.14

Initial power-on defaults

Upon initial application of power to the device, the following register bits are set to a '0' state:

watchdog register, TR, FT, AFE, ABE, and SQWE. The following bits are set to a '1' state:

ST, OUT, and HT (see Table 8 on page 26).

Table 7.

Table 8.

Default values

STOP bit (ST)

Units

Min

Max

0

0

96

98

ms

0

1

40

1.

Default setting

ms

1

X

50

2000

µs

Condition

TR

ST

HT

Out

FT

AFE

ABE

SQWE

WATCHDOG

1.

WDS, BMB0-BMB4, RB0, RB1.

Initial power-up

2.

State of other control bits undefined.

01

110

00

0

0

Subsequent power-up (with battery

3.

UC = Unchanged

UC

UC

1

UC

0

0

0

0

0