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XC2000 датащи(PDF) 71 Page - Infineon Technologies AG |
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XC2000 датащи(HTML) 71 Page - Infineon Technologies AG |
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71 / 729 page ![]() XC2000 Derivatives Peripheral Units (Vol. 2 of 2) The General Purpose Timer Units Preliminary User’s Manual 14-53 V1.0, 2007-06 GPT_X7, V2.0 14.2.6 GPT2 Clock Signal Control All actions within the timer block GPT2 are triggered by transitions of its basic clock. This basic clock is derived from the system clock by a basic block prescaler, controlled by bitfield BPS2 in register T6CON (see Figure 14-20). The count clock can be generated in two different ways: • Internal count clock, derived from GPT2’s basic clock via a programmable prescaler, is used for (gated) timer mode. • External count clock, derived from the timer’s input pin(s), is used for counter mode. For both ways, the basic clock determines the maximum count frequency and the timer’s resolution: Internal Count Clock Generation In timer mode and gated timer mode, the count clock for each GPT2 timer is derived from the GPT2 basic clock by a programmable prescaler, controlled by bitfield TxI in the respective timer’s control register TxCON. The count frequency f Tx for a timer Tx and its resolution rTx are scaled linearly with lower clock frequencies, as can be seen from the following formula: [14.2] The effective count frequency depends on the common module clock prescaler factor F(BPS2) as well as on the individual input prescaler factor 2 <TxI>. Table 14-15 summarizes the resulting overall divider factors for a GPT2 timer that result from these cascaded prescalers. Table 14-14 Basic Clock Selection for Block GPT2 Block Prescaler 1) 1) Please note the non-linear encoding of bitfield BPS2. BPS2 = 01 B BPS2 = 00 B 2) 2) Default after reset. BPS2 = 11 B BPS2 = 10 B Prescaling Factor for GPT2: F(BPS2) F(BPS2) = 2 F(BPS2) = 4 F(BPS2) = 8 F(BPS2) = 16 Maximum External Count Frequency f GPT/4 f GPT/8 f GPT/16 f GPT/32 Input Signal Stable Time 2 × t GPT 4 × t GPT 8 × t GPT 16 × t GPT fTx fGPT FBPS2 () 2 <Txl> × --------------------------------------------- = rTx µs [] FBPS2 () 2 <Txl> × fGPT MHz [] --------------------------------------------- = |
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