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writes.

Registers

design with positive edge clocking and no

internal tri-states

technological process

PERIPHERALS

○

Processor execution control

Run

Halt

Step into instruction

Skip instruction

○

Read-write all processor contents

Program Counter (PC)

Program Memory

Internal (direct) Data Memory

Special Function Registers (SFRs)

External Data Memory

○

Hardware execution breakpoints

Program Memory

Internal (direct) Data Memory

Special Function Registers (SFRs)

External Data Memory

○

Hardware breakpoints activated at a certain

Program address (PC)

Address by any write into memory

Address by any read from memory

Address by write into memory a required data

Address by read from memory a required data

○

Three wire communication interface

○

Power management mode

○

Switchback feature

○

Stop mode

○

2 priority levels

○

2 external interrupt sources

CONFIGURATION

The following parameters of the DP80390CPU

core can be easy adjusted to requirements of

dedicated application and technology. Configu-

ration of the core can be prepared by effortless

changing appropriate constants in package file.

There is no need to change any parts of the

code.

- synchronous

•

Internal Program Memory

type

- asynchronous

-

•

Internal Program ROM

Memory size

-

0 - 64kB

-

•

Internal Program RAM

Memory size

-

0 - 64kB

- true

•

Internal Program Memory

fixed size

- false

-

subroutines

location

- used

- unused

- used

- unused

- used

- unused

Besides mentioned above parameters all

available peripherals and external interrupts

can be excluded from the core by changing

appropriate constants in package file.

DELIVERABLES

◊

VHDL Source Code or/and

◊

VERILOG Source Code or/and

◊

Encrypted, or plain text EDIF netlist

◊

Active-HDL automatic simulation macros

◊

ModelSim automatic simulation macros

◊

Tests with reference responses

◊

Installation notes

◊

HDL core specification

◊

Datasheet

◊

IP Core implementation support

◊

3 months maintenance

●

Delivery the IP Core updates, minor and

major versions changes

●

Delivery the documentation updates

●

Phone & email support