AD1884A datasheet(6/20 Pages) AD

6 / 20 page

Rev. 0

Page 6 of 20

March 2008

AD1884A

MICROPHONE BIAS

MIC_BIAS-B, MIC_BIAS-C

MIC_BIAS_IN (Pin 33) = 5 V or 3.3 V

VREF Setting = High-Z

High-Z

VREF Setting = 0 V

V dc

VREF Setting = 50%

1.65

V dc

MIC_BIAS_IN (Pin 33) = 5 V

VREF Setting = 80%

3.7

V dc

VREF Setting = 100%

3.9

V dc

MIC_BIAS_IN (Pin 33) = 3.3 V

VREF Setting = 80%

2.86

V dc

VREF Setting = 100%

3.0

V dc

MIC_BIAS-E (When Enabled as BIAS)

VREF Setting = High-Z

High-Z

VREF Setting = 0 V

V dc

VREF Setting = 50%

1.65

V dc

VREF Setting = 80%

2.86

V dc

VREF Setting = 100%

3.0

V dc

Output Drive Current

VREF Setting = 50%, 80%, or 100%

1.6

GPIO 0

Input Signal High (VIH)DVIO × 0.60

DVIO

Input Signal Low (VIL)0

DVIO × 0.24

Output Signal High (VOH)

IOUT = –500 μADVIO × 0.72

DVIO

Output Signal Low (VOL)IOUT = +1500 μA0

DVIO × 0.10

Input Leakage Current (Signal High) (IIH)

150

Input Leakage Current (Signal Low) (IIL)–50

μA

GPIO 1 and GPIO 2

Input Signal High (VIH)AVDD × 0.60

AVDD

Input Signal Low (VIL)0

AVDD × 0.24

Output Signal High (VOH)IOUT = –500 μAAVDD × 0.72

AVDD

Output Signal Low (VOL)IOUT = +1500 μA0

AVDD × 0.10

Input Leakage Current (Signal High) (IIH)

150

Input Leakage Current (Signal Low) (IIL)–50

μA

S/PDIF-Out

Input Signal High (VIH)DVIO × 0.60

DVIO

Input Signal Low (VIL)0

DVIO × 0.24

Output Signal High (VOH)

IOUT = –500 μADVIO × 0.72

DVIO

Output Signal Low (VOL)IOUT = +1500 μA0

DVIO × 0.10

Input Leakage Current (Signal High) (IIH)

150

Input Leakage Current (Signal Low) (IIL)–50

μA

Parameter

Min

Typ

Max

Unit

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