MIC2185 datasheet(3/15 Pages) MICREL

3 / 15 page

October 2005

MIC2185

Micrel, Inc.

Absolute Maximum Ratings (Note 1)

Supply Voltage (VINA, VINP)..........................................15V

Digital Supply Voltage (VDD)............................................7V

Skip Pin Voltage (VSKIP)....................................–0.3V to 7V

Comp Pin Voltage (VCOMP) ...............................–0.3V to 3V

Feedback Pin Voltage (VFB)..............................–0.3V to 3V

Enable Pin Voltage (VEN/UVLO).......................–0.3V to 15V

Current Sense Voltage (VCSH) ..........................–0.3V to 1V

Sync Pin Voltage (VSYNC) ................................–0.3V to 7V

Freq/2 Pin Voltage (VFREQ/2).............................–0.3V to 7V

Power Dissipation (PD)

16 lead SOP ...................................400mW @ TA = 85°C

16 lead QSOP .................................245mW@ TA = 85°C

Ambient Storage Temp............................. –65°C to +150°C

Operating Ratings (Note 2)

Supply Voltage (VINA, VINP)......................... +2.9V to +14V

Operating Ambient Temperature...........–40°C ≤ TA ≤ +85°C

Junction Temperature.........................–40°C ≤ TJ ≤ +125°C

PackageThermal Resistance

θJA 16-lead SOP................................................100°C/W

θJA 16-lead QSOP .............................................163°C/W

ESD Rating,

Note 3

Electrical Characteristics

VINA= 5V, VinP= VOUT=12V, VEN/UVLO = 5V, VSKIP = 0V, VFREQ/2 = 0V, VCSH = 0V, TJ = 25°C, unless otherwise speciﬁed. Bold values

indicate –40°C < TJ < +125°C.

Parameter

Condition

Min

Typ

Max

Units

Regulation

Feedback Voltage Reference

(±1%)

1.233

1.245

1.258

(±2%)

1.220

1.270

3V ≤ VINA ≤ 9V; 0mV ≤ CSH ≤ 75mV; (±3%)

1.208

1.245

1.282

Feedback Bias Current

Output Voltage Line Regulation

3V ≤ VINA ≤ 9V

+0.08

% / V

Output Voltage Load Regulation

0mV ≤ CSH ≤ 75mV

–1.2

Input & VDD Supply

VINA Input Current, PWM mode

VSKIP = 0V

0.8

VINP Input Current, PWM mode

VSKIP = 0V (excluding external MOSFET gate current)

3.8

VINA Input Current, SKIP mode

VSKIP = 5V

0.6

Shutdown Quiescent Current

VEN/UVLO = 0V; (IVINA + IVINP)

0.5

µA

Digital Supply Voltage (VDD)

IL = 0

2.8

3.0

3.2

Digital Supply Load Regulation

IL = 0 to 0.5mA

0.03

Undervoltage Lockout

VDD upper threshold (turn on threshold)

2.9

2.75

VDD lower threshold (turn off threshold)

2.65

Reference Output (VREF)

Reference Voltage

(±1.5%)

1.226

1.245

1.264

(±2.5%)

1.213

1.276

Reference Voltage Line

5V < VinA < 9V

Regulation

Reference Voltage Load

0 < IREF < 100µA

Regulation

Enable/UVLO

Enable Input Threshold

0.6

0.9

1.2

UVLO Threshold

1.4

1.5

1.6

UVLO Hysteresis

140

Enable Input Current

VEN/UVLO = 5V

0.2

µA

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