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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ST72311R датащи(PDF) 94 Page - STMicroelectronics |
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ST72311R датащи(HTML) 94 Page - STMicroelectronics |
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94 / 164 page  ST72311R, ST72511R, ST72512R, ST72532R 94/164 SERIAL COMMUNICATIONS INTERFACE (Cont’d) 10.6.4 Functional Description The block diagram of the Serial Control Interface, is shown in Figure 52. It contains 6 dedicated reg- isters: – Two control registers (CR1 & CR2) – A status register (SR) – A baud rate register (BRR) – An extended prescaler receiver register (ERPR) – Anextended prescaler transmitter register (ETPR) Refer to the register descriptions in Section 10.6.7for the definitions of each bit. 10.6.4.1 Serial Data Format Word length may be selected as being either 8 or 9 bits by programming the M bit in the CR1 register (see Figure 52). The TDO pin is in low state during the start bit. The TDO pin is in high state during the stop bit. An Idle character is interpreted as an entire frame of “1”s followed by the start bit of the next frame which contains data. A Break character is interpreted on receiving “0”s for some multiple of the frame period. At the end of the last break frame the transmitter inserts an ex- tra “1” bit to acknowledge the start bit. Transmission and reception are driven by their own baud rate generator. Figure 53. Word length programming Bit0 Bit1 Bit2 Bit3 Bit4 Bit5 Bit6 Bit7 Bit8 Start Bit Stop Bit Next Start Bit Idle Frame Bit0 Bit1 Bit2 Bit3 Bit4 Bit5 Bit6 Bit7 Start Bit Stop Bit Next Start Bit Start Bit Idle Frame Start Bit 9-bit Word length (M bit is set) 8-bit Word length (M bit is reset) Possible Parity Bit Possible Parity Bit Break Frame Start Bit Extra ’1’ Data Frame Break Frame Start Bit Extra ’1’ Data Frame Next Data Frame Next Data Frame |
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