ST62T55B datasheet(14/74 Pages) STMICROELECTRONICS

14 / 74 page

14/74

ST62T55B ST62T65B/E65B

1.4 PROGRAMMING MODES

1.4.1 Option Byte

The Option Byte allows configuration capability to

the MCUs. Option byte’s content is automatically

read, and the selected options enabled, when the

chip reset is activated.

It can only be accessed during the programming

mode. This access is made either automatically

(copy from a master device) or by selecting the

OPTION BYTE PROGRAMMING mode of the pro-

grammer.

The option byte is located in a non-user map. No

address has to be specified.

EPROM Code Option Byte

PROTECT. This bit allows the protection of the

software contents against piracy. When the bit

PROTECT is set high, readout of the OTP con-

tents is prevented by hardware. No programming

equipment is able to gain access to the user pro-

gram. When this bit is low, the user program can

be read.

EXTCNTL. This bit selects the External STOP

Mode capability. When EXTCNTL is high, pin NMI

controls if the STOP mode can be accessed when

the watchdog is active. In addition, PB0 is forced

as open drain output. When EXTCNTL is low, the

STOP instruction is processed as a WAIT as soon

as the watchdog is active.

PB2-3 PULL. When set this bit removes pull-up at

reset on PB2-PB3 pins. When cleared PB2-PB3

pins have an internal pull-up resistor at reset.

PB0-1 PULL. When set this bit removes pull-up at

reset on PB0-PB1 pins. When cleared PB0-PB1

pins have an internal pull-up resistor at reset.

WDACT. This bit controls the watchdog activation.

When it is high, hardware activation is selected.

The software activation is selected when WDACT

is low.

DELAY. This bit enables the selection of the delay

internally generated after pin RESET is released.

When DELAY is low, the delay is 2048 cycles of

the oscillator, it is of 32768 cycles when DELAY is

high.

OSCIL. When this bit is low, the oscillator must be

controlled by a quartz crystal, a ceramic resonator

or an external frequency. When it is high, the oscil-

lator must be controlled by an RC network, with

only the resistor having to be externally provided.

D0. Reserved. Must be cleared to zero.

The Option byte is written during programming ei-

ther by using the PC menu (PC driven Mode) or

automatically (stand-alone mode)

1.4.2 Program Memory

EPROM/OTP programming mode is set by a

+12.5V voltage applied to the TEST/VPP pin. The

programming flow of the ST62T65B/E65B is de-

scribed in the User Manual of the EPROM Pro-

gramming Board.

The

MCUs

can

programmed

with

the

ST62E6xB EPROM programming tools available

from SGS-THOMSON.

Table 5. ST6255B, ST62T65B/E65B

Program Memory Map

Note: OTP/EPROM devices can be programmed

with

the

development

tools

available

from

SGS-THOMSON

(ST62E6X-EPB

ST626X-KIT).

1.4.3 EEPROM Data Memory

EEPROM data pages are supplied in the virgin

state FFh. Partial or total programming of EEP-

ROM data memory can be performed either

through the application software, or through an ex-

ternal programmer. Any SGS-THOMSON tool

used for the program memory (OTP/EPROM) can

also be used to program the EEPROM data mem-

ory.

PRO-

TECT

EXTC -

NTL

PB2-3

PULL

PB0-1

PULL

WDACT DELAY OSCIL

Device Address

Description

0000h-007Fh

0080h-0F9Fh

0FA0h-0FEFh

0FF0h-0FF7h

0FF8h-0FFBh

0FFCh-0FFDh

0FFEh-0FFFh

Reserved

User ROM

Reserved

Interrupt Vectors

Reserved

NMI Interrupt Vector

Reset Vector

ST62T55B датащи(PDF) 14 Page - STMicroelectronics

ST62T55B датащи(HTML) 14 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74

датащи скачать

ссылки URL