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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ST62T52C датащи(PDF) 21 Page - STMicroelectronics |
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ST62T52C датащи(HTML) 21 Page - STMicroelectronics |
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21 / 78 page  21/78 ST62T52C ST62T62C/E62C CLOCK SYSTEM (Cont’d) Figure 11. Clock Circuit Block Diagram Figure 12. Maximum Operating Frequency (fMAX) versus Supply Voltage (VDD) Notes: 1. In this area, operation is guaranteed at the quartz crystal frequency. 2. When the OSG is disabled, operation in this area is guaranteed at the crystal frequency. When the OSG is enabled, operation in this area is guar- anteed at a frequency of at least fOSG Min. 3. When the OSG is disabled, operation in this area is guaranteed at the quartz crystal frequency. When the OSG is enabled, access to this area is prevented. The internal frequency is kept a fOSG. 4. When the OSG is disabled, operation in this area is not guaranteed When the OSG is enabled, access to this area is prevented. The internal frequency is kept at fOSG. MAIN OSCILLATOR OSG LFAO M U X Core :13 :12 :1 TIMER 1 Watchdog POR fINT Main Oscillator off 1 2.5 3.6 4 4.5 5 5.5 6 8 7 6 5 4 3 2 Maximum FREQU ENCY (MHz) SUPPLY VOLTAGE (VDD) 3 4 3 2 1 fOSG fOSG Min (at 85°C) VR01807J fOSG Min (at 125°C) 20 |
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