ST18952 datasheet(19/67 Pages) STMICROELECTRONICS

номер детали	ST18952

подробное описание детали	DIGITAL SIGNAL PROCESSOR DSP CHIP

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ST18952

6.2

BSU control registers

The BSU is programmed by six control registers mapped in the Y-memory space. These

define the type of memory used, internal to external boundary address crossing, exchange

type (external direct or through the BSU) and software wait-states count.

There are 2 registers per memory space, making it possible to define 2 sets of boundaries and

wait state numbers.

Figure 6.2

Default and user mapping examples

The BSU control registers include a reference address on bits 4 to 9, where the internal/

external memory boundary value is stored (see Figure 6.2), and software wait-states count on

bits 0 to 3, allowing up to 16 wait-states.

External addressing is recognized by comparing these address bits for each valid address

from IA, XA and YA, to the reference address contained into the corresponding control

If the address is greater or equal to the reference value, an external access proceeds.

In the following register descriptions, ‘-’ means RESERVED (read: 0, write: don’t care).

EXTERNAL

INTE RNAL1

64K

63K

62K

INTERNAL 0

DEFA ULT MAPPING (RESET)

USER MAPPI NG

(CAN CHANGE BY 1K STEP)

VALUE 1

VALUE 0

VALUE 1

VALUE 0

EXTE RNAL

INTERNAL1

INTERNAL0

64K

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