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CS495303 датащи(PDF) 17 Page - Cirrus Logic

номер детали CS495303
подробное описание детали  32-bit Audio Decoder DSP Family with Dual DSP Engine Technology
PDF  38 Pages
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производитель  CIRRUS [Cirrus Logic]
домашняя страница  http://www.cirrus.com
Logo CIRRUS - Cirrus Logic

CS495303 датащи(HTML) 17 Page - Cirrus Logic

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CS4953xx Data Sheet
32-bit Audio Decoder DSP Family
DS705PP2
®Copyright 2008 Cirrus Logic, Inc.
17
5.13 Switching Characteristics — Serial Control Port - I2C Master Mode
Figure 6. Serial Control Port - I2C Master Mode Timing
Parameter
Symbol
Min
Max
Units
SCP_CLK frequency1
1. The specification fiicck indicates the maximum speed of the hardware. The system designer should be aware that
the actual maximum speed of the communication port may be limited by the firmware application.
fiicck
-
400
kHz
SCP_CLK low time
tiicckl
1.25
-
µs
SCP_CLK high time
tiicckh
1.25
-
µs
SCP_SCK rising to SCP_SDA rising or falling for START or STOP
condition
tiicckcmd
1.25
µs
START condition to SCP_CLK falling
tiicstscl
1.25
-
µs
SCP_CLK falling to STOP condition
tiicstp
2.5
-
µs
Bus free time between STOP and START conditions
tiicbft
3-
µs
Setup time SCP_SDA input valid to SCP_CLK rising
tiicsu
100
ns
Hold time SCP_SDA input after SCP_CLK falling
tiich
20
-
ns
SCP_CLK low to SCP_SDA out valid
tiicdov
-18
ns
SCP_CLK
SCP_SDA
0
1
6780
1
7
tiicckl
tiicckh
tiicsu
tiich
A6
A0
R/W
ACK
LSB
8
ACK
MSB
tiicstp
6
tiicdov
tiicbft
tiicstscl
tiicckcmd
fiicck
tiicckcmd
tiicf
tiicr



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