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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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ST10F280 датащи(PDF) 117 Page - STMicroelectronics |
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ST10F280 датащи(HTML) 117 Page - STMicroelectronics |
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117 / 186 page  ST10F280 117/186 Baud Rate Generation The Baud rate generator is clocked by fCPU/2. The timer is counting downwards and can be started or stopped through the global enable Bit SSCEN in register SSCCON. Register SSCBR is the dual-function Baud Rate Generator/Reload register. Reading SSCBR, while the SSC is enabled, returns the content of the timer. Reading SSCBR, while the SSC is disabled, returns the programmed reload value. In this mode the desired reload value can be written to SSCBR. Note Never write to SSCBR, while the SSC is enabled. The formulas below calculate the resulting Baud rate for a given reload value and the required reload value for a given Baud rate: (SSCBR) represents the content of the reload register, taken as unsigned 16 Bit integer. Table 26 lists some possible Baud rates against the required reload values and the resulting bit times for a 40MHz CPU clock. Baud rateSSC = fCPU 2 x [(SSCBR) + 1] SSCBR = ( fCPU 2 x Baud rateSSC ) 1 Table 26 : Synchronous Baud Rate and Reload Values Baud Rate Bit Time Reload Value Reserved use a reload value > 0. --- --- 10M Baud 100ns 0001h 5M Baud 200ns 0003h 2.5M Baud 400ns 0007h 1M Baud 1 µs 0013h 100K Baud 10 µs 00C7h 10K Baud 100 µs 07CFh 1K Baud 1ms 4E1Fh 306 Baud 3.26ms FF4Eh |
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