Data Sheet

ADP1761

1 A, Low VIN, Low Noise, CMOS Linear Regulator

Rev. D

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FEATURES

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1 A maximum output current

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Low input voltage supply range

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VIN = 1.10 V to 1.98 V, no external bias supply required

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Fixed output voltage range: VOUT_FIXED = 0.9 V to 1.5 V

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Adjustable output voltage range: VOUT_ADJ = 0.5 V to 1.5 V

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Ultralow noise: 2 µV rms, 100 Hz to 100 kHz

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Noise spectral density

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4 nV/√Hz at 10 kHz

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3 nV/√Hz at 100 kHz

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Low dropout voltage: 30 mV typical at 1 A load

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Operating supply current: 4.5 mA typical at no load

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±1.5% fixed output voltage accuracy over line, load, and temper-

ature

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Excellent power supply rejection ratio (PSRR) performance

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67 dB typical at 10 kHz at 1 A load

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51 dB typical at 100 kHz at 1 A load

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Excellent load/line transient response

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Soft start to reduce inrush current

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Optimized for small 10 µF ceramic capacitors

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Current-limit and thermal overload protection

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Power-good indicator

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Precision enable

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16-lead, 3 mm × 3 mm LFCSP package

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AEC-Q100 qualified for automotive applications

APPLICATIONS

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Regulation to noise sensitive applications such as RF trans-

ceivers, analog-to-digital converter (ADC) and digital-to-analog

converter (DAC) circuits, phase-locked loops (PLLs), voltage

controlled oscillators (VCOs) and clocking integrated circuits

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Field-programmable gate array (FPGA) and digital signal pro-

cessor (DSP) supplies

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Medical and healthcare

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Industrial and instrumentation

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Automotive

TYPICAL APPLICATION CIRCUITS

Figure 1. Fixed Output Operation

Figure 2. Adjustable Output Operation

GENERAL DESCRIPTION

The ADP1761 is a low noise, low dropout (LDO) linear regulator.

It is designed to operate from a single input supply with an input

voltage as low as 1.10 V, without the requirement of an external

bias supply to increase efficiency and provide up to 1 A of output

current.

The low 30 mV typical dropout voltage at a 1 A load allows the

ADP1761 to operate with a small headroom while maintaining regu-

lation and providing better efficiency. The ADP1761 is optimized for

stable operation with small 10 µF ceramic output capacitors.

The ADP1761 delivers optimal transient performance with minimal

board area.

The ADP1761 is available in fixed output voltages ranging from 0.9

V to 1.5 V. The output of the adjustable output model can be set

from 0.5 V to 1.5 V through an external resistor connected between

VADJ and ground.

The ADP1761 has an externally programmable soft start time by

connecting a capacitor to the SS pin. Short-circuit and thermal

overload protection circuits prevent damage in adverse conditions.

The ADP1761 is available in a small 16-lead LFCSP package for

the smallest footprint solution to meet a variety of applications.