CAT1021, CAT1022, CAT1023

© Catalyst Semiconductor, Inc.

5

Doc. No. MD-3009 Rev. M

Characteristics subject to change without notice

CAPACITANCE

Symbol

Test

Test Conditions

Max

Units

(1)

Output Capacitance

8

pF

(1)

Input Capacitance

6

pF

AC CHARACTERISTICS

V

Memory Read & Write Cycle

(2)

Symbol

Parameter

Min

Max

Units

Clock Frequency

400

kHz

Input Filter Spike Suppression (SDA, SCL)

100

ns

Clock Low Period

1.3

µs

Clock High Period

0.6

µs

(1)

SDA and SCL Rise Time

300

ns

(1)

SDA and SCL Fall Time

300

ns

Start Condition Hold Time

0.6

µs

Start Condition Setup Time (for a Repeated Start)

0.6

µs

Data Input Hold Time

0

ns

Data Input Setup Time

100

ns

Stop Condition Setup Time

0.6

µs

SCL Low to Data Out Valid

900

ns

Data Out Hold Time

50

ns

(1)

Time the Bus must be Free Before a New Transmission Can Start

1.3

µs

(3)

Write Cycle Time (Byte or Page)

5

ms

Notes:

(1) This parameter is characterized initially and after a design or process change that affects the parameter. Not 100% tested.

(2) Test Conditions according to “AC Test Conditions” table.

(3) The write cycle time is the time from a valid stop condition of a write sequence to the end of the internal program/erase cycle. During the

write cycle, the bus interface circuits are disabled, SDA is allowed to remain high and the device does not respond to its slave address.