EM78P341 datasheet(79/102 Pages) EMC

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EM78P341N/342N/343N

8-Bit Microprocessor with OTP ROM

Product Specification (V1.0) 12.01.2006

• 73

(This specification is subject to change without further notice)

6.12 Power-on Considerations

Any microcontroller is not warranted to start operating properly before the power supply

stabilizes in steady state. The EM78P341N/342N/343N POR voltage range is 1.55 ~

1.7V. Under customer application, when power is switched OFF, Vdd must drop below

1.9V and remains at OFF state for 10

µs before power can be switched ON again.

Subsequently, the EM78P341N/342N/343N will reset and work normally. The extra

external reset circuit will work well if Vdd rises fast enough (50ms or less). However,

under critical applications, extra devices are still required to assist in solving power-on

problems.

6.12.1 Programmable WDT Time-out Period

The Option word (WDTPS) is used to define the WDT time-out period (18ms

5 or

4.5ms

6). Theoretically, the range is from 4.5ms or 18ms. For most crystal or ceramic

resonators, the lower the operation frequency is, the longer is the required set-up time.

6.12.2 External Power-on Reset Circuit

The circuit shown in the following figure implements an external RC to produce a reset

pulse. The pulse width (time constant) should be kept long enough to allow the Vdd to

reach the minimum operating voltage. This circuit is used when the power supply has a

slow power rise time. Because the current leakage from the /RESET pin is about

±5µA,

it is recommended that R should not be greater than 40 K. This way, the voltage at Pin

/RESET is held below 0.2V. The diode (D) functions as a short circuit at power-down.

The “C” capacitor is discharged rapidly and fully. Rin, the current-limited resistor,

prevents high current discharge or ESD (electrostatic discharge) from flowing into Pin

/RESET.

/RESET

Vdd

Rin

Fig. 6-22 External Power-on Reset Circuit

VDD=5V, WDT time-out period = 16.5ms ± 30%.

VDD=3V, WDT time-out period = 18ms ± 30%.

VDD=5V, WDT time-out period = 4.2ms ± 30%.

VDD=3V, WDT time-out period = 4.5ms ± 30%.

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