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TDA7563B датащи(PDF) 22 Page - STMicroelectronics |
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TDA7563B датащи(HTML) 22 Page - STMicroelectronics |
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22 / 33 page ![]() I2C Bus TDA7563B 22/33 7.2.4 Acknowledge The transmitter* puts a resistive HIGH level on the SDA line during the acknowledge clock pulse (see Figure 31). The receiver** the acknowledges has to pull-down (LOW) the SDA line during the acknowledge clock pulse, so that the SDAline is stable LOW during this clock pulse. * Transmitter –master ( μP) when it writes an address to the TDA7563B – slave (TDA7563B) when the μP reads a data byte from TDA7563B ** Receiver – slave (TDA7563B) when the μP writes an address to the TDA7563B – master (µP) when it reads a data byte from TDA7563B Figure 29. Data validity on the I2C Bus Figure 30. Timing diagram on the I2C Bus Figure 31. Acknowledge on the I2C Bus SDA SCL DATA LINE STABLE, DATA VALID CHANGE DATA ALLOWED D99AU1031 SCL SDA START I2CBUS STOP D99AU1032 SCL 1 MSB 23789 SDA START ACKNOWLEDGMENT FROM RECEIVER D99AU1033 |
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