DA7282-00FVC datasheet(21/75 Pages) RENESAS

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LRA/ERM Ultra-Low Power Haptic Driver with Multiple Input Triggers and Integrated Waveform Memory

R15DS0041EE0330 Rev.3.30

June 16, 2026

CFR0011-120-00

Page 21

6.2.5

Pulse Width Modulation Mode

PWM mode is used to stream haptic sequences to DA7282 via the GPI_0/PWM input pin where the output drive

level is determined by the duty cycle of the PWM signal. For optimal start-up timing, the PWM input signal needs

to be provided before setting OPERATION_MODE = 2. The PWM duty cycle can be interpreted in two ways as

follows:

If ACCELERATION_EN = 1, the output drive level is equal to the input signal duty cycle multiplied by the voltage

stored in ACTUATOR_NOMMAX. In this case the duty cycle is interpreted as a proportion between 0 % and 100

%, see Figure 31. The automatic Active Acceleration and Rapid Stop (if enabled) features will take the output up

to the voltage in ACTUATOR_ABSMAX and/or reverse the drive level to be negative during level transitions, but

in steady state the final value will always scale to the voltage in ACTUATOR_NOMMAX.

If ACCELERATION_EN = 0, the output drive level is equal to the input signal duty cycle multiplied by the voltage

stored in ACTUATOR_ABSMAX. In this case the duty cycle is interpreted as a proportion between -100 % and

100 % where 50 % duty cycle is 0 %, see Figure 32. When DA7282 is set up to drive an ERM, the negative

value represents a change in drive voltage polarity, while for an LRA it represents a phase shift of 180° in the

drive signal. Negative drive can be used to speed up output acceleration level changes without the use of the

Active Acceleration and Rapid Stop. Note that in the ACCELERATION_EN = 0 case Rapid Stop can still be

enabled if an automatic stop to zero actuator acceleration is required.

NOTE

The output PWM frequency is always independent of the PWM input frequency regardless of whether frequency tracking

is enabled or disabled. To maximize accuracy and minimize power consumption and noise, it is best to keep the input

PWM frequency as low as possible.

The PWM demodulator is rising edge sensitive. The minimum duty cycle that can be used to create the drive

level can be configured in FULL_BRAKE_THR; any duty cycle below that value will produce a 0 % drive level.

During playback streaming in PWM mode, if a 0 % drive level is maintained by applying a 0 % (or 50 % if Active

Acceleration is disabled) duty cycle PWM input, the DA7282 output stage is disabled to save power. Drive is re-

enabled automatically, with one LRA half-period delay, when the duty cycle forces the drive level to be greater

than 0 %.

ACCELERATION_EN = 0,

60% Duty Cycle

ACCELERATION_EN = 0,

90% Duty Cycle

ACCELERATION_EN = 0,

50% Duty Cycle

ACCELERATION_EN = 0,

40% Duty Cycle

ACCELERATION_EN = 0,

10% Duty Cycle

PWM

Signal

DA7282

Output

Figure 9. Example PWM inputs with ACCELERATION_EN = 0

Note the 180° phase difference between driving > 50 % and < 50 %.

6.2.6

If sequence consistency or I2C bus availability is a concern, register triggered waveform memory mode (RTWM)

mode can be used to play back previously defined sequences from the Waveform Memory, see Section 6.8, via

I2C register trigger only. Enter this mode by setting OPERATION_MODE = 3.

6.2.6.1

I2C Triggering and Sequence Looping

Sequence selection is done via PS_SEQ_ID with the additional option to loop the sequence up to 16 times using

PS_SEQ_LOOP. To trigger a sequence, set SEQ_START = 1. Once a sequence completes, the event is

reported by dropping the nIRQ pin low and signaling via SEQ_DONE_M.

To repeat a sequence immediately following completion of playback, set SEQ_CONTINUE = 1.

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