DA7282 datasheet(36/75 Pages) RENESAS

номер детали	DA7282

подробное описание детали	LRA/ERM Ultra-Low Power Haptic Driver with Multiple Input Triggers and Integrated Waveform Memory

PDF	75 Pages

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производитель	RENESAS [Renesas Technology Corp]

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LRA/ERM Ultra-Low Power Haptic Driver with Multiple Input Triggers and Integrated Waveform Memory

R15DS0041EE0330 Rev.3.30

June 16, 2026

CFR0011-120-00

Page 36

For example, if a short circuit occurs, the system will react in its usual way: stop driving, disable the current loop,

and go to Inactive mode. Once in Inactive mode, the generated interrupt is automatically cleared and DA7282

will attempt to drive again on the next playback request without the host having to come in and clear faults.

6.7.8

Polarity Change Reporting for Half-Period Control in DRO Mode

For advanced sequence playback in DRO mode, the host may require DA7282 to update the output drive

amplitude every half period. Since the I2C clock is asynchronous to the DA7282 internal clock and the exact

timing of the half-period will change dynamically based on the frequency tracking loop, this is not a trivial

operation.

To overcome this limitation, the register POLARITY provides feedback. POLARITY toggles at the start of every

half-period (so at a rate of 400 Hz for a 200 Hz resonant frequency actuator). This allows software

synchronization of the updates to the OVERRIDE_VAL, see Figure 19.

Did POLARITY

toggle?

Update

OVERRIDE_VAL

Wait 25 µs

Yes

Read POLARITY

Figure 19. Half-period control in DRO mode

The timing of the sequence can be described as follows in Figure 20 where Amplitude X denotes consecutive

different output drive values:

Time [s]

OUTP

OUTN

POLARITY

OVERRIDE_VAL

I2C Update

Amplitude

Figure 20. Polarity timing relationship

DA7282 датащи(PDF) 36 Page - Renesas Technology Corp