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AW32905 датащи(PDF) 15 Page - Shanghai awinic technology co.,ltd |
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AW32905 датащи(HTML) 15 Page - Shanghai awinic technology co.,ltd |
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15 / 23 page ![]() AW32901/AW32902/AW32905/ AW32909/AW32910/AW32912 Apr. 2018 V1.0 www.awinic.com.cn 15 Copyright © 2016 SHANGHAI AWINIC TECHNOLOGY CO., LTD PCB LAYOUT CONSIDERATION To make fully use of the performance of AW329XX, the guidelines below should be followed. 1. All the peripherals should be placed as close to the device as possible. Place the input capacitor CIN on the top layer (same layer as the AW329XX) and close to IN pin, and place the output capacitor COUT on the top layer (same layer as the AW329XX) and close to OUT pin. 2. If external TVS is used, IN pin routing passes through the external TVS firstly, and then connect AW329XX. 3. Red bold paths on figure 4 and 5 are power lines that will flow large current, please route them on PCB as straight, wide and short as possible. 4. If R1 and R2 are used, route OVLO line on PCB as short as possible to reduce parasitic capacitance. 5. The power trace from USB connector to AW329XX may suffer from ESD event, keep other traces away from it to minimize possible EMI and ESD coupling. 6. Use rounded corners on the power trace from USB connector to AW329XX to decrease EMI coupling. |
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